Hitachi, Ltd.

Hitachi High-tech Corporation

Renesas Electronics Corporation

Renesas Technology Corp.

Hitachi Chemical Company, Ltd.

Hitachi-kokusai Electric Inc.

Hirotaka Hamamura

Toshiyuki Mine

Yasuhiro Shimamoto

Digh Hisamoto

Itaru Yanagi

Masaki Yamada

Katsuya Miura

Yuki Mori

Mieko Matsumura

Yu Zhao

Kiyohiko Sato

Hiroyuki Okino

Kazunori Shinoda

Naoki Tega

Toshiyuki Ohno

Kenji Ishikawa

Masaru Hori

Keiji Watanabe

Yoshinobu Kimura

Natsuki Yokoyama

Kenetsu Yokogawa

Hiroshi Miki

Hiroya Ohta

Natsuki Tsuno

Takashi Hattori

Yasushi Kurata

Masato Yoshida

Jiro Yugami

Kenji Maeda

Takeshi Nojiri

Masatoshi Morishita

Shimpei Tsujikawa

Tadashi Terasaki

Katsuhiko Yamamoto

Tooru Tanaka

Keisuke Kobayashi

Shuichiro Adachi

Akihiro Orita

Renichi Yamada

Yoshiki Yonamoto

Tsuyoshi Hayasaka

Thi-Thuy-Nga Nguyen

A method for selective removal of a titanium aluminum carbide film against titanium aluminum nitride films by using near atmospheric pressure plasma that is a rich non-halogen radical source to produce various radicals (e.g. NH, H, CH, N, Ar, OH, O) from Ar and liquid vapor for film surface modification. The modified layer is able to form volatile products that can be easily removed by heating.

Etching method and etching apparatus

Provided is an etching technique providing higher uniformity of etching amount and a higher yield of etching processing. An etching method for etching a film layer as a processing object containing nitride of transition metal, the film layer being disposed on a surface of a wafer, includes a step of supplying reactive particles containing fluorine and hydrogen but containing no oxygen to a surface of the film layer to form a reaction layer on the surface of the film layer, and a step of eliminating the reaction layer by heating the film layer.

Etching method

Provided is a method of manufacturing a magnetic tunnel junction that simultaneously realizes removal of oxides on side walls of a magnetic layer and formation of a protective film and prevents deterioration of magnetic characteristics. The method includes: a first stepof etching a stacked film including a first magnetic layer, a MgO barrier layer, and a second magnetic layer stacked in order by plasma etching using an oxidizing gas to form the magnetic tunnel junction; and a second stepof simultaneously introducing an organic acid gas which is an n-valent acid and a precursor gas having a corresponding metal element valence of m, to form a first protective film on side walls of the magnetic tunnel junction. In the second step, the precursor gas is introduced at a molar ratio of n/m or more with respect to 1 mole of the organic acid gas introduced.

Method of manufacturing magnetic tunnel junction and magnetic tunnel junction

A magnetic tunnel junction device includes a first ferromagnetic layer, a tunnel barrier that is in contact with the first ferromagnetic layer, and a synthetic ferrimagnetic reference layer that is in contact with the tunnel barrier while being in the other side of the first ferromagnetic layer, in which the synthetic ferrimagnetic reference layer includes a second ferromagnetic layer that has a first magnetization direction while being in contact with the tunnel barrier, a magnetic layer that has a second magnetization direction which is anti-parallel to the first magnetization direction, and a first nonmagnetic layer that is interposed between the second ferromagnetic layer and the magnetic layer, and lateral dimensions of the magnetic layer of the synthetic ferrimagnetic reference layer are made larger than lateral dimensions of the first ferromagnetic layer and the second ferromagnetic layer.

Magnetic tunnel junction device, magnetoresistive random access memory using same and manufacturing method of magnetic tunnel junction device

To provide a magnetic tunnel junction (MTJ) element that is adapted to suppress the degradation of magnetic properties of a magnetic tunnel junction layer due to plasma CVD layer formation and adapted for miniaturization. The MTJ element includes a magnetic tunnel junction layer () and a plurality of passivation layers formed on a side wall of the magnetic tunnel junction layer. The plurality of passivation layers are SiN layers formed under different plasma CVD layer forming conditions and include a first passivation layerformed in direct contact with the magnetic tunnel junction layer. A hydrogen ion density or hydrogen ion energy of a layer forming condition for the first passivation layer is lower than a hydrogen ion density or hydrogen ion energy of a layer forming condition for the other of the plural passivation layers. The other passivation layers include a passivation layer, a nitrogen density of which is higher than a nitrogen density of the first passivation layer.

Magnetic tunnel junction element, magnetic memory using the same, and manufacture method of magnetic tunnel junction element

A MOSFET using a SiC substrate has a problem that a carbon-excess layer is formed on a surface by the application of mechanical stress due to thermal oxidation and the carbon-excess layer degrades mobility of channel carriers. In the invention, (1) a layer containing carbon-carbon bonds is removed; (2) a gate insulating film is formed by a deposition method; and (3) an interface between a crystal surface and the insulating film is subjected to an interface treatment at a low temperature for a short time. Due to this, the carbon-excess layer causing characteristic degradation is effectively eliminated, and at the same time, dangling bonds can be effectively eliminated by subjecting an oxide film and an oxynitride film to an interface treatment.

Silicon carbide semiconductor device and method for manufacturing same

A composition for forming a passivation layer, comprising a compound represented by Formula (I): M(OR). In Formula (I), M comprises at least one metal element selected from the group consisting of Nb, Ta, V, Y and Hf, each Rindependently represents an alkyl group having from 1 to 8 carbon atoms or an aryl group having from 6 to 14 carbon atoms, and m represents an integer from 1 to 5.

Composition for forming passivation layer, semiconductor substrate having passivation layer, method of producing semiconductor substrate having passivation layer, photovoltaic cell element, method of producing photovoltaic cell element and photovoltaic cell

In a non-volatile memory in which writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film serving as a charge accumulation layer, in order to realize a high efficiency of a hole injection from a gate electrode, the gate electrode of a memory cell comprises a laminated structure made of a plurality of polysilicon films with different impurity concentrations, for example, a two-layered structure comprising a p-type polysilicon film with a low impurity concentration and a p'-type polysilicon film with a high impurity concentration deposited thereon.

Semiconductor storage device and manufacturing method thereof

Provided is a technique of securing reliability of a gate insulating film, as much as in a Si power MOSFET, in a semiconductor device in which a semiconductor material having a larger band gap than silicon is used, and which is typified by, for example, an SiC power MOSFET. In order to achieve this object, in the in the SiC power MOSFET, the gate electrode GE is formed in contact with the gate insulating film GOX, and is formed of the polycrystalline silicon film PFhaving the thickness equal to or smaller than 200 nm, and the polycrystalline silicon film PFformed in contact with the polycrystalline silicon film PFand having any thickness.

Semiconductor device and method of manufacturing the same

In a semiconductor inspection method using a semiconductor inspection device, by selecting an incident energy and a negative potential and scanning an inspection surface of a wafer with primary electrons to detect secondary electrons, a first inspection image is acquired, and a macro defect, stacking faults, a basal plane dislocation and a threading dislocation contained in the first inspection image are discriminated by image processing based on a threshold value of a signal amount of the secondary electrons determined in advance. Moreover, by selecting the incident energy and a positive potential and scanning the inspection surface of the wafer with primary electrons to detect the secondary electrons, a second inspection image is acquired, and a threading screw dislocation of a dot-shaped figure contained in the second inspection image is discriminated by image processing based on a threshold value of a signal amount of the secondary electrons determined in advance.

Semiconductor inspection method, semiconductor inspection device and manufacturing method of semiconductor element

The present invention is to cause high channel mobility and a high threshold voltage to coexist in a SiC-MOSFET power device which uses a SiC substrate. The SiC MOSFET which is provided with a layered insulation film having electric charge trap characteristics on a gate insulation film has an irregular threshold voltage in a channel length direction of the SiC MOSFET, and in particular, has a shorter area having a maximum threshold voltage in the channel length direction compared to an area having other threshold voltages.

MOS field effect transistor

In a SiC-MOSFET power device for which a SiC substrate is used, a laminated insulating film having a charge-trapping characteristic is employed as a gate insulating film of the SiC-DiMOSFET, and charges are injected into the laminated insulating film, thereby suppressing a change in the gate threshold voltage.

Field effect silicon carbide transistor

A SiC MOSFET has a subject that resistance in the source region is increased when annealing for metal silicidation is performed to a source region before forming the gate insulating film, the metal silicide layer of the source region is oxidized by an oxidizing treatment (including oxynitriding treatment) when the gate insulating film is formed. When a metal silicide layer to be formed on the surface of a SiC epitaxial substrate is formed before forming a gate insulating film interface layer (oxide film), and an anti-oxidation film for the metal silicide is formed on the metal silicide layer, it is possible to suppress oxidation of the metal silicide layer by the oxidizing treatment upon forming the gate insulating film interface layer and the resistance of the source region can be decreased without lowering the channel mobility.

Silicon carbide semiconductor device and manufacturing method thereof

A MOSFET having a high mobility may be obtained by introducing nitrogen to the channel region or the interface between the gate dielectric film and the SiC substrate of the SiC MOSFET, but there is a problem that a normally-on MOSFET is obtained. For realizing both a high mobility and normally-off, and for providing a SiC MOSFET having further high reliability, nitrogen is introduced to the channel region of the SiC substrate or the interface between the gate dielectric film and the SiC substrate, and furthermore a metal oxide film having a thickness of 10%, or less of the total thickness of the gate dielectric film is inserted in the gate dielectric film.

Silicon carbide semiconductor device

Growing community of inventors

Tokyo, Japan

Hirotaka Hamamura