Sanyo Electric Co., Ltd.

Hiroshi Onodera

Masashige Aoyama

Masanori Nishida

An insulated gate field effect transistor fabricated in one conductivity type semiconductor substrate wherein a source region and a drain region are formed apart each other to define a channel region therebetween, having a deep ion implantation region which is so formed in the lower portion of the channel region that at least one end portion of the depletion region of the channel extends towards the source region beyond the border between the source region and the channel region at the surface of the substrate whereby an imaginary straight line drawn from said border at the surface of the substrate and an intersecting point between the depletion region of the source and the depletion region of the channel region without a back gate bias voltage defines an angle larger than 90.degree. against the surface of the substrate.

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Gunma, Japan

Hiroshi Onodera