Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Hiroshi Onoda

Natsuo Ajika

Yuichi Kunori

Makoto Ohi

Atsushi Fukumoto

Takeshi Nakayama

Shinichi Kobayashi

Yasushi Terada

Yoshikazu Miyawaki

Tomoshi Futatsuya

Masaaki Mihara

Kiyohiko Sakakibara

Hiroaki Morimoto

Hiroshi Takada

Takahiro Oonakado

Tadashi Nishioka

Fumitoshi Yamamoto

Yasunori Yamashita

Naho Nishioka

Kimitoshi Sato

A base of a low breakdown voltage npn bipolar transistor has p diffusion layers. A field insulating layer is formed on the p diffusion layer located between the p diffusion layer and an emitter, while the p diffusion layer encloses the surface of the emitter and has a window part immediately under the emitter. Thus, a semiconductor device and a method of fabricating the same capable of suppressing dispersion of a current amplification factor h in a wafer plane of the low breakdown voltage transistor and fabricating the low breakdown voltage transistor and a high breakdown voltage transistor through simple steps are obtained.

Semiconductor device having low and high breakdown voltage transistors

An aluminum wire is connected to a P-type layer of a polydiode element through a resistive element consisting of a barrier metal film and a tungsten plug. Another aluminum wire is connected to an N-type layer of the polydiode element through another resistive element consisting of another barrier metal film and another tungsten plug. Thus, a semiconductor device including a polydiode element which is resistant to surge or contamination is provided.

Method of making a semiconductor device having a polydiode element

Semiconductor device comprising a polydiode element

In a non-volatile semiconductor memory device according to the present invention, a p type source region and a p type drain region are formed in the surface of an n well. A floating gate electrode and a control gate electrode are formed on a channel region with a tunnel oxide film interposed therebetween. According to this structure, a negative potential is applied to the drain region and a positive potential is applied to the control gate electrode when data is programmed, whereby electrons are injected from the drain region to the floating gate electrode by a band-to-band tunnel current induced hot electron injection current in the drain region. As a result, a non-volatile semiconductor memory device is provided which can prevent deterioration of the tunnel oxide film and which can be miniaturized.

Non-volatile semiconductor memory device

Each nonvolatile transistor comprises a floating gate electrode, an ONO film and a control gate electrode. An upper surface of a silicon oxide film is positioned at a height between upper and lower surfaces of the floating gate electrode. The control gate electrode continuously extends on the floating gate electrode and the silicon oxide film in a prescribed arrangement direction.

Nonvolatile semiconductor memory device and method of fabricating the

In erasing, electrons are simultaneously injected into floating gates from sources of a plurality of memory cells. Thus, the threshold voltages of the plurality of memory cells are increased. In programming, electrons are emitted from a floating gate of a selected memory cell to a drain. Thus, the threshold voltage of the selected memory cell is reduced.

Electrically programmable and erasable nonvolatile semiconductor memory

In a semiconductor memory device according to the present invention, a conductive layer is formed on a field oxide film in a boundary region on the main surface of a semiconductor substrate. A floating gate electrode, an interlayer insulating film, and a control gate electrode are formed on the semiconductor substrate in a memory cell array region with a gate insulating film interposed therebetween. A gate electrode is formed in a peripheral circuit region with the gate insulating film interposed therebetween. An interlayer insulating film is formed on the conductive layer, the gate electrode, and the control gate electrode. A contact hole is formed at a predetermined position of the interlayer insulating film. An interconnection layer is selectively formed on the interlayer insulating film including the inner surface of the contact hole. According to the present invention, it is possible to prevent formation of a concave portion on the surface of the field oxide film in the boundary region. It is also possible to protect the memory cell array region from an external noise by forming the conductive layer on the field oxide film in the boundary region and by fixing the potential of the conductive layer.

Method of making memory cells with peripheral transistors

Semiconductor memory device and method of manufacturing the same

The width of a charge storage electrode and a control electrode in the column direction is set to be wider above an element isolation region than that above a channel region. Therefore, the capacitance between the control electrode and the charge storage electrode can be increased to improve the coupling ratio in a nonvolatile semiconductor memory device. Also, a first interconnection layer is equal in height above the control electrode and above the channel region, so that patterning of the first interconnection layer can be carried out easily and precisely.

Nonvolatile semiconductor device and a method of manufacturing thereof

Accurate etching control using focused ion beams can be achieved if the etching is performed in accordance with a detection signal obtained by detecting an electric current passing from a semiconductor device to ground or secondary electrons generated when the charged beams are spirally applied to a predetermined area during the charged-beam scanning operation. Therefore, the end point of the process can be accurately detected and uniform processing results can be obtained. As a result, precise etching control can be performed and a reliable semiconductor device can be manufactured.

Method of controlling etching with a focused charged beam by detecting

The method for repairing the pattern is to repair the lacking portion of the pattern included in the X-ray exposure mask with the WF.sub.6 gas being filled in the vicinity thereof, wherein the focused ion beam irradiates the defect portion, whereby the WF.sub.6 gas is decomposed to form a tungsten thin film so as to at least fill the lacking portion. On this occasion, the focused ion beam is successively applied so that it is always in contact with the edge of the tungsten thin film constituting the pattern.

Growing community of inventors

Hyogo, Japan

Hiroshi Onoda