Kabushiki Kaisha Toshiba

Mochida Pharmaceutical Co., Ltd.

Dojindo Laboratories

N.e. Chemcat Corporation

Hiroshi Mochizuki

Hiroyuki Kanaya

Osamu Hidaka

Kumi Okuwada

Iwao Kunishima

Hideyuki Funaki

Koji Yamakawa

Susumu Shuto

Hiroyuki Takenaka

Norihisa Arai

Tomio Katata

Toshinori Kanamori

Naofumi Sato

Tsuyoshi Iwamoto

Kanae Fujii

Sumito Ootsuki

Yoshinori Kumura

Minoru Taguchi

Masahiro Nobuhara

Kazumi Sasamoto

Ryoji Maruyama

Akito Takayama

Daikichi Horiguchi

There is provided a semiconductor device having a ferroelectric capacitor formed on a semiconductor substrate covered with an insulator film, wherein the ferroelectric capacitor comprises: a bottom electrode formed on the insulator film; a ferroelectric film formed on the bottom electrode; and a top electrode formed on the ferroelectric film. The ferroelectric film has a stacked structure of either of two-layer-ferroelectric film or three-layer-ferroelectric film. The upper ferroelectric film is metallized and prevents hydrogen from diffusing in lower ferroelectric layer. Crystal grains of the stacked ferroelectric films are preferably different.

Ferroelectric memory device having a hydrogen barrier film

A semiconductor integrated circuit has a ferroelectric capacitor. The ferroelectric capacitor includes a first insulation film formed above a semiconductor substrate, a first electrode which is buried in a fist hole formed in the first insulation film and whose surface is flattened, a second insulation film formed above the first insulation film and having a second hole above the first electrode, a ferroelectric film formed in the second hole, and a second electrode formed in the second hole and above the ferroelectric film and flattened so as to be flush with a surface of the second insulation film.

Semiconductor integrated circuit and method for manufacturing the same

The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film. One of the drain region and the source region and one of the upper electrode and the lower electrode of the capacitor are connected to each other by an electrode wiring. A wiring connected to the other one of the drain region and the source region is formed on the semiconductor substrate.

Semiconductor device and method for the manufacture thereof

Semiconductor device and method for manufacturing the same

The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film. One of the drain region and the source region and one of the upper electrode and the lower electrode of the capacitor are connected to each other by an electrode wiring. A wiring connected to the other one of the drain region and the source region is formed on the semiconductor. substrate.

A semiconductor integrated circuit has a ferroelectric capacitor. The ferroelectric capacitor includes a first insulation film formed above a semiconductor substrate, a first electrode which is buried in a first hole formed in the first insulation film and whose surface is flattened, a second insulation film formed above the first insulation film and having a second hole above the first electrode, a ferroelectric film formed in the second hole, and a second electrode formed in the second hole and above the ferroelectric film and flattened so as to be flush with a surface of the second insulation film.

A method of manufacturing a semiconductor apparatus comprises the steps of forming, on a surface of a semiconductor substrate, an MIS transistor including a drain region and a source region each formed of an impurity diffusion region, forming an insulation film on the semiconductor substrate after the MIS transistor has been formed, selectively forming contact holes in the insulation film, embedding, into the contact hole, a capacitor contact plug having a lower end which is in contact with one of the drain region and the source region of the MIS transistor, forming a ferroelectric capacitor having a lower electrode, a ferroelectric film and an upper electrode on the insulation film after the capacitor contact plug has been formed, and forming an electric wire for establishing a connection between the upper electrode of the ferroelectric capacitor and an upper surface of the capacitor contact plug.

Method of forming a ferroelectric device

Semiconductor device having ferroelectric capacitor structures

A lateral Hall element includes a substrate, a first-conductivity type active layer formed on the substrate, a first second-conductivity type semiconductor layer formed to surround the first-conductivity type active layer and formed to a depth to reach the substrate, a pair of first first-conductivity type semiconductor layers of high impurity concentration selectively formed with a preset distance apart from each other on the surface of the first-conductivity type active layer, current supply electrodes respectively formed on the pair of first first-conductivity type semiconductor layers, a pair of second first-conductivity type semiconductor layers of high impurity concentration formed with a preset distance apart from each other on the surface of the first-conductivity type active layer in position different from the first first-conductivity type semiconductor layers, sensor electrodes respectively formed on the pair of second first-conductivity type semiconductor layers, and a plurality of second second-conductivity type semiconductor layers formed on the surface of the first-conductivity type active layer in position different from the first and second first-conductivity type semiconductor layers.

Lateral hall element

Acridinium compounds represented by the general formula (I) where A is an intervening group which does not have activity for binding with a specific binding substance, Z is a labelling active group which has activity for binding with a specific binding substance, R.sup.1 is a halogen atom, an alkyl group or an aryl group; R.sup.2, R.sup.3, R.sup.4 and R.sup.5 are each a hydrogen atom, an alkyl group, an aryl group, an alkoxy group, a nitro group, a halogen atom or a carbonyl group, and Y is a counter ion. The acridinium compounds may form conjugates with specific binding substances. The acridinium compounds have high emission efficiency and stability and, hence, are useful as chemiluminescence labelling agents.

Acridinium compounds and conjugates thereof

In a Hall element, a semiconductor layer is surrounded by a first trench filled with an insulator. A first current supply portion of an n+-type semiconductor is disposed adjacent the semiconductor layer and the first trench. Second current supply portions are also disposed adjacent the semiconductor layer and the first trench and symmetrical with respect to the first current supply portion. Sensor portions of an n+-type semiconductor are disposed adjacent the semiconductor layer and the first trench at about the center between the first and second current supply portions, respectively. A magnetic flux perpendicular to the upper surface of the semiconductor layer can be detected by the foregoing arrangement.

Hall element for detecting a magnetic field perpendicular to a substrate

A fluorescent compound, which is readily capable of forming a stable complex with a rare-earth metal ion having fluorescence with satisfactory intensity even in an aqueous system and long fluorescence lifetime when formed a complex with the rare-earth metal ion, a complex of the fluorescent compound and the rare-earth metal ion, and a labelled reagent made therefrom, together with a specific binding assay using said labelling agent. A fluorescent compound expressed by the following formula A, typically exemplified by 2,15-diaza[3,3](2,9)-1,10-phenanthrolinophane-N.sup.2,N.sup.15 -diacetic acid. ##STR1##

Fluorescent compound, complex, reagent, and specific binding assay

For providing a semiconductor integrated circuit device including CCD type, bipolar type and MOS type integrated circuits in only one chip, island-shaped epitaxial layers of opposite conductivity type are disposed in a semiconductor substrate of one conductivity type having a low impurity concentration. A field oxide layer is provided so as to surround a periphery of an exposed surface of each epitaxial layer. A buried layer of opposite conductivity type having a high impurity concentration is is interposed between the semiconductor substrate and each epitaxial layer in such a manner that at least one edge thereof terminates to the lower surfaace of the field oxide layer. The CCD type integrated circuit is provided in the semiconductor substrate, and the bipolar type and MOS type integrated circuits are arranged in the epitaxial layers.

Growing community of inventors

Tokyo, Japan

Hiroshi Mochizuki