Sanken Electric Co., Ltd.

Hiromichi Kumakura

Hiroshi Shikauchi

Hiroko Kawaguchi

Hirokazu Goto

Tomonori Hotate

Satoru Washiya

Takashi Kato

Koji Ohtsuka

Yuki Tanaka

Ryohei Baba

Toru Yoshie

Youhei Ohno

Takasi Kato

Shinji Kudoh

Shuichi Okubo

A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.

Semiconductor device and method for manufacturing the semiconductor device

A semiconductor device and a method for forming the semiconductor device. The semiconductor device includes a first semiconductor region having a first conductivity type; and a second semiconductor region having a second conductivity type. The first semiconductor region is configured within the second semiconductor region and a plurality of crystal defects are formed in the second semiconductor region and at least part of the first semiconductor region is surrounded by the plurality of crystal defects. Therefore, recombination of charge carriers (electrons and holes) on a lateral direction and a longitudinal direction could be taken into account, and the switching time of the semiconductor device could be adequately decreased.

Semiconductor device and method for forming the semiconductor device

A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide drift layer, a buried silicon carbide layer and an oxide semiconductor layer; the buried silicon carbide layer is located within the silicon carbide drift layer and the buried silicon carbide layer is covered by the oxide semiconductor layer. Therefore, breakdown behavior and/or long-time reliability of the semiconductor device may be further improved.

Provided is a highly reliable semiconductor device that uses a thick passivation layer. The protective film is formed so as to cover mostly the entire surface of a semiconductor substrate, and is open only in an area of part that is above a metal wiring layer (connection area). The passivation layer includes starting from the bottom side, a first silicon nitride film that includes silicon nitride (SiN), a silicon oxide film that includes silicon oxide (SiO), and an organic film (organic layer) that includes a polyimide. The silicon oxide film and organic film are formed so as to cover the electrode layer (metal wiring layer) except the top of the insulation layer and the connection area, however, the first silicon nitride film is formed only on the insulation layer and not formed on the electrode layer.

Semiconductor device

A semiconductor device includes a semiconductor base body having a first main surface and a second main surface, the first main surface and the second main surface being opposite with each other; a Schottky electrode that is disposed on the first main surface and forms a Schottky junction with the semiconductor base body; and a barrier metal layer that is brought into ohmic contact with the first main surface around the Schottky electrode and covers a side surface of the Schottky electrode.

A semiconductor device includes an n-type semiconductor substrate, which has a main surface having an element region and an outer peripheral region surrounding the element region; a p-type guard ring, which includes: a lowly-doped p-type region disposed on an upper surface of the semiconductor substrate in the outer peripheral region surrounding the element region; and a highly-doped p-type region disposed on an inner side of the lowly-doped p-type region and having an impurity concentration higher than an impurity concentration of the lowly-doped p-type region, wherein a side surface and a bottom surface of the highly-doped p-type region are covered by the lowly-doped p-type region such that the highly-doped p-type region is not in contact with the n-type region; and an ohmic junction electrode, which forms an ohmic junction with the highly-doped p-type region.

A semiconductor device having a main electrode connected to a first semiconductor region and a second semiconductor layer on a semiconductor substrate so that a pn-junction diode is formed with the first semiconductor region being interposed and a Schottky barrier diode is formed with the second semiconductor layer being interposed on a surface of the semiconductor substrate, the semiconductor device includes a first electrode configured to ohmic-contact the first semiconductor region; a second electrode configured to Schottky-contact the second semiconductor layer and not having a portion directly contacting the first electrode; and a conductive reaction suppression layer to suppress a reaction between a material configuring the first electrode and a material configuring the second electrode are provided on the surface of the semiconductor substrate, and the main electrode is electrically connected to the first electrode and the second electrode.

Semiconductor device and method of manufacturing the same

A first insulation film is made of a silicon material and is provided on a semiconductor base. A second insulation film is made of an organic material and is provided on the first insulation film. The second insulation film is thicker than the first insulation film. A third insulation film is thinner than the second insulation film and is provided on the second insulation film. The third insulation film is made of a silicon material and has a moisture resistance property. A fourth insulation film is made of an organic material. The fourth insulation film is provided on the third insulation film to prevent a damage on the third insulation film. A wiring layer is provided on the fourth insulation film.

Semiconductor device having hall-effect and manufacturing method thereof

A current detector comprising a first and a second current-path detector each in the form of a sheet-metal punching having a pair of relatively broad terminal webs of rectangular shape joined together via a bridge of arcuate shape. The bridges are slender compared to the terminal webs for concentrated current flow therethrough. Various arrangements are possible for the two current-path conductors, but their bridges are invariably placed in superposition upon one another. A Hall generator is positioned between the bridges so as to be acted upon by magnetic fields created upon current flow therethrough. One of the terminal webs of the first current-path conductor is electrically connected to one terminal web of the second, in such a way that the magnetic lines of force due to current flow through the two bridges act in the same direction upon the Hall generator.

Hall-effect current detector

A current detector comprising a Hall generator assembly and a current-path conductor assembly. The Hall generator assembly includes a Hall generator in the form of a semiconductor chip mounted to a metal-made mounting plate via a sheet of magnetic material such as Permalloy. A plastic encapsulation envelops at least parts of all the components of the Hall generator assembly. The current-path conductor assembly includes a sheet-metal current-path conductor and a plastic holder molded in one piece therewith. The Hall generator assembly and the current-path conductor assembly are combined by bonding together the encapsulation of the Hall generator assembly and the conductor holder of the current-path conductor assembly into a unitary casing for the current detector. A covering of Permalloy or the like envelopes the casing.

A Hall-effect semiconductor device is formed on a metal-made baseplate, as of nickel-plated copper, via a magnetic layer of Permalloy or the like. Higher in magnetic permeability than the baseplate, the magnetic layer is designed to reduce the magnetic resistance of the flux path. A plastic encapsulation thoroughly encloses the semiconductor device, magnetic layer, and baseplate.

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Saitama, Japan

Hiromichi Kumakura