Toyota Jidosha Kabushiki Kaisha

Denso Corporation

Denso Corpora Tion

Hirokazu Fujiwara

Yukihiko Watanabe

Narumasa Soejima

Masaki Konishi

Takashi Katsuno

Takeo Yamamoto

Takeshi Endo

Eiichi Okuno

Toshimasa Yamamoto

Yuichi Takeuchi

Jun Saito

Tomoharu Ikeda

Tsuyoshi Ishikawa

Jun Morimoto

Tomoo Morino

Shinichiro Miyahara

Jun Kawai

Shinya Nishimura

Masatoshi Tsujimura

Yukihiko Watanbe

A technique achieving a higher voltage resistance by a depletion layer extending quickly within a circumferential region is provided. A semiconductor device includes an element region in which an insulated gate type switching element is provided and a circumferential region adjacent to the element region. First and second trenches are provided in the circumferential region. A front surface region of the second-conductivity-type is provided between the first and second trenches. First and second bottom surface regions of the second-conductivity-type are provided in bottom surface ranges of the first and second trenches. First and second side surface regions of the second-conductivity-type connecting the front surface region and the first or second bottom surface region is provided along side surfaces of the first and second trenches. Low area density regions are provided in at least parts of the first and second side surface regions.

Semiconductor device and semiconductor device manufacturing method

A switching device includes a semiconductor substrate; a trench; a conductor layer extending in a longitudinal direction of the trench so as to be in contact with a bottom surface of the trench; a bottom insulating layer covering an upper surface of the conductor layer; a gate insulating layer covering a side surface of the trench; and a gate electrode disposed in the trench. The semiconductor substrate includes a first semiconductor region of a first conductivity type, a body region of a second conductivity type, a second semiconductor region of the first conductivity type, a bottom semiconductor region of the second conductivity type extending in the longitudinal direction so as to be in contact with the conductor layer, and a connection semiconductor region of the second conductivity type connected to the body region and to the bottom semiconductor region.

Switching device and method of manufacturing the same

A semiconductor device includes a p-type semiconductor region in contact with a bottom face of a trench gate, wherein the p-type semiconductor region includes a first p-type semiconductor region containing a first type of p-type impurities and a second p-type semiconductor region containing a second type of p-type impurities. The first p-type semiconductor region is located between the trench gate and the second p-type semiconductor region. In a view along the depth direction, the second p-type semiconductor region is located within a part of the first p-type semiconductor region. A diffusion coefficient of the second type of p-type impurities is smaller than a diffusion coefficient of the first type of p-type impurities.

Semiconductor device and manufacturing method thereof

Higher voltage resistance is accomplished by expanding a depletion layer more quickly within a circumferential region. A semiconductor device includes an element region, in which an insulated gate type switching element is provided, and the circumferential region. A first trench and a second trench spaced apart from the first trench are provided in the front surface in the circumferential region. Insulating films are provided in the first trench and the second trench. A fourth region of the second conductivity type is provided so as to extend from a bottom surface of the first trench to a bottom surface of the second trench. A fifth region of the first conductivity type continuous from the third region is provided under the fourth region.

Semiconductor device with front and rear surface electrodes on a substrate having element and circumferential regions, an insulating gate type switching element in the element region being configured to switch between the front and rear surface electrodes

A technique disclosed herein improves a voltage resistance of an insulated gate type semiconductor device. A provided method is a method for manufacturing an insulated gate type switching device configured to switch between a front surface electrode and a rear surface electrode. The method includes implanting a first kind of second conductivity type impurities to bottom surfaces of gate trenches and diffusing the implanted first kind of second conductivity type impurities, and implanting a second kind of second conductivity type impurities to the bottom surfaces of the circumferential trenches and diffusing the implanted second kind of second conductivity type impurities.

Insulated gate type semiconductor device having floating regions at bottom of trenches in cell region and circumferential region and manufacturing method thereof

A manufacturing method of a semiconductor device includes: forming an electric metal layer by depositing metal as art electrode material on an inside of an opening of an insulating layer on a surface of an SiC semiconductor substrate; widening a gap between an inner wall surface in an opening formed in the insulating layer and the electrode metal layer by etching the insulating layer after the electrode metal layer is formed; and forming an ohmic contact between the electrode metal layer and the SiC semiconductor substrate by heating the SiC semiconductor substrate and the metal electrode layer after the insulating layer is etched.

Semiconductor device and manufacturing method of semiconductor device

A wafer examination device includes a probe, a fusion section and a measurement section. The probe is made of a metal which reacts with silicon carbide to produce silicide. The fusion section fuses the probe to a silicon carbide wafer as an examined object. The measurement section measures an electrical property of the silicon carbide wafer through the fused probe.

Wafer examination device and wafer examination method

A method for producing a semiconductor device includes: an arranging process of arranging a plurality of silicon carbide wafers having opposed first and surfaces so that the first surface and the second surface of adjacent silicon carbide wafers face each other and are separated in parallel; and a heat treatment process of heating the arranged plurality of silicon carbide wafers so that the first surface of each silicon carbide wafer becomes higher in temperature than the second surface thereof, and, in the adjacent silicon carbide wafers, the second surface of one silicon carbide wafer becomes higher in temperature than the first surface of the other silicon carbide wafer that faces the second surface.

Method for producing semiconductor device

A switching element is provided having a semiconductor substrate. A trench gate electrode is formed in the upper surface of the semiconductor substrate. An n-type first semiconductor region, a p-type second semiconductor region, and an n-type third semiconductor region are formed in a region in contact with a gate insulating film in the semiconductor substrate. At a position below the second semiconductor region, there is formed a p-type fourth semiconductor region connected to the second semiconductor region and opposing the gate insulating film via the third semiconductor region and containing boron. A high-concentration-carbon containing region having a carbon concentration higher than that of a semiconductor region exposed on the lower surface of the semiconductor substrate is formed in at least a part of the portion of the third semiconductor region, positioned between the fourth semiconductor region and the gate insulating film, that is in contact with the fourth semiconductor region.

Switching element and manufacturing method thereof

A method of manufacturing a semiconductor device includes forming a drift layer on a substrate; forming a base layer on the drift layer; forming a trench to penetrate the base layer and to reach the drift layer; rounding off a part of a shoulder corner and a part of a bottom corner of the trench; covering an inner wall of the trench with an organic film; implanting an impurity to a surface portion of the base layer; forming a source region by activating the implanted impurity; and removing the organic film after the source region is formed, in which the substrate, the drift layer, the base layer and the source region are made of silicon carbide, and the implanting and the activating of the impurity are performed under a condition that the trench is covered with the organic film.

Method of manufacturing silicon carbide semiconductor device

A method for manufacturing a semiconductor device including a semiconductor substrate composed of silicon carbide, an upper surface electrode which contacts an upper surface of the substrate, and a lower surface electrode which contacts a lower surface of the substrate, the method including steps of: (a) forming an upper surface structure on the upper surface side of the substrate, and (b) forming a lower surface structure on the lower surface side of the substrate. The step (a) comprises steps of: (a1) depositing an upper surface electrode material layer on the upper surface of the substrate, the upper surface electrode material layer being a raw material layer of the upper surface electrode, and (a2) annealing the upper surface electrode material layer. The step (b) comprises steps of: (b1) depositing a lower surface electrode material layer on the lower surface of the substrate, the lower surface electrode material layer being a raw material layer of the lower surface electrode, and (b2) annealing the lower surface electrode material layer with a laser to make an ohmic contact between the lower surface electrode and the substrate.

Semiconductor device manufacturing method

A SiC semiconductor device having a Schottky barrier diode includes: a substrate made of SiC and having a first conductive type, wherein the substrate includes a main surface and a rear surface; a drift layer made of SiC and having the first conductive type, wherein the drift layer is disposed on the main surface of the substrate and has an impurity concentration lower than the substrate; a Schottky electrode disposed on the drift layer and has a Schottky contact with a surface of the drift layer; and an ohmic electrode disposed on the rear surface of the substrate. The Schottky electrode directly contacts the drift layer in such a manner that a lattice of the Schottky electrode is matched with a lattice of the drift layer.

SiC semiconductor device having Schottky barrier diode and method for manufacturing the same

A silicon carbide semiconductor device with a Schottky barrier diode includes a first conductivity type silicon carbide substrate, a first conductivity type silicon carbide drift layer on a first surface of the substrate, a Schottky electrode forming a Schottky contact with the drift layer, and an ohmic electrode on a second surface of the substrate. The Schottky electrode includes an oxide layer in direct contact with the drift layer. The oxide layer is made of an oxide of molybdenum, titanium, nickel, or an alloy of at least two of these elements.

Silicon carbide semiconductor device with Schottky barrier diode and method of manufacturing the same

A method of making a semiconductor device includes forming a p-type semiconductor region to an n-type semiconductor substrate in such a manner that the p-type semiconductor region is partially exposed to a top surface of the semiconductor substrate, forming a Schottky electrode of a first material in such a manner that the Schottky electrode is in Schottky contact with an n-type semiconductor region exposed to the top surface of the semiconductor substrate, and forming an ohmic electrode of a second material different from the first material in such a manner that the ohmic electrode is in ohmic contact with the exposed p-type semiconductor region. The Schottky electrode is formed earlier than the ohmic electrode.

Semiconductor device making method

First, a first layer made of Ni or an alloy including Ni may be formed on an upper surface of a semiconductor layer. Next, a second layer made of silicon oxide may be formed on an upper surface of the first layer. Next, a part, which corresponds to a semiconductor region, of the second layer may be removed. Next, second conductive type ion impurities may be injected from upper sides of the first and second layers to the semiconductor layer after the removing step.

Growing community of inventors

Miyoshi, Japan

Hirokazu Fujiwara