Matsushita Electric Industrial Co., Ltd.

Sumitomo Chemical Company, Limited

Panasonic Corporation

Matsushita Electronics Corporation

Hiroaki Fujimoto

Hirosi Kisida

Kimitoshi Umeda

Noriyasu Sakamoto

Akira Shuto

Toshiyuki Fukuda

Noritada Matsuo

Masanori Minamio

Takashi Yui

Ryuichi Sahara

Yoshinobu Kunitomo

Tomotoshi Imahase

Takao Ishiwatari

Toru Nomura

Hiroki Tomioka

Naoto Meki

Takashi Ohtsuka

Kenzo Hatada

Hirotaka Takano

Takayuki Yoshida

Ichiro Yamane

Yoji Takada

Kazuhiko Matsumura

Hisaki Fujitani

Tsuyoshi Hamatani

Tadaaki Mimura

Masahiro Tamaki

Toru Tsuchiya

Yoshiaki Kasuga

Shinitsu Takehashi

Atsuhito Mizutani

Takio Yamashita

Kenichi Mikitani

Kazue Nishida

Yoriko Ogasawara

Yoshinobu Takeshita

Toshio Matsuki

Yoshifumi Nakamura

Nozomi Shimoishizaka

Takahiro Kumakawa

Shigeru Saito

Taro Hirose

Izumi Fujimoto

Tetsuo Kawakita

Kazumi Watase

Koichi Nagao

Tomohiro Tamaki

Takashi Otsuka

Kazuyuki Kaino

Masaharu Noyori

Kazuya Otani

Hiroshi Kisida

Akihiro Yamamoto

Yoshihiro Tomita

Junya Takahashi

Tatsuya Mori

Sumio Nishida

Noriyuki Yoshikawa

Tadashi Ohsumi

Kazunari Nishihara

Kenichi Itou

Tatsuya Ishida

Yasuo Kikuchi

Kouichi Nagao

Tatsufumi Ikeda

Shin-itsu Takehashi

Yoshinori Shono

Shinji Umeda

Mutsuo Tsuji

Kenzou Hatada

Yoshiaki Takeoka

Hideyuki Kaneko

Yukiko Nakaoka

Koji Hidaka

Kichizo Kudoh

Masahiro Iamaki

Tsuguo Sakiyama

Kimiaki Takeda

Tsuguihiro Katoh

An aluminum wire is bonded to a silicon electrode by a wedge tool pressing the aluminum wire against the silicon electrode. In this way, a firmly bonded structure is obtained by sequentially stacking aluminum, aluminum oxide, silicon oxide, and silicon.

Bonded structure and bonding method

According to the present invention, protrusionsare formed on electrodesof semiconductor elements, and an optical memberis secured on the semiconductor elementwith an adhesiveso as to be pressed onto the protrusions

Semiconductor device and method of manufacturing the same

There is provided a connection structure between a Si electrode (Si member) and an Al wire (Al member). Between the Si electrode and the Al wire, a first part and second parts are present in interposed relation. Each of the first and second parts is in contact with the Si electrode and with the Al wire. In the first part, a Si oxide layer and an Al oxide layer are present. The Si oxide layer is in contact with the Si electrode. The Al oxide layer is interposed between the Si oxide layer and the Al wire. In some of the second parts, Al is present. In the others of the second parts, a Si portion and an Al portion are present.

Connection structure and method for fabricating the same

There are provided a lead frame including a plurality of first external terminal portionsprovided on a plane, inner lead portionsformed of back surfaces of the respective first external terminal portions and arranged so as to surround a region inside the inner lead portions, and second external terminal portionsformed of uppermost surfaces of convex portions positioned outside the respective inner lead portions; a semiconductor elementflip-chip bonded to the inner lead portions via bumps; and an encapsulating resinencapsulating surroundings of the semiconductor element and the inner lead portions. The first external terminal portions are arranged in a lower surface region of the encapsulating resin along a periphery of the region, and the second external terminal portions are exposed on an upper surface of the encapsulating resin. A plurality of terminalsfor electrical connection are provided in a grid pattern in a region inside the first external terminal portions and exposed on a lower surface of the encapsulating resin. A plurality of semiconductor elements or coils and resistors can be incorporated, and further semiconductor devices can be stacked.

Resin-encapsulated semiconductor device and lead frame, and method for manufacturing the same

Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.

Semiconductor device and method for the fabrication thereof including grinding a major portion of the frame

An optical device cavity structure includes: insulator layers and metal layers alternately layered on one another; a first terminal section which is formed on a mounting surface to be mounted on a wiring substrate and which is electrically connected to the wiring substrate; a cavity portion having a generally rectangular opening formed in a central portion of the upper surface; and a light-transmitting member placement section formed on the upper surface surrounding the opening for receiving a light-transmitting member thereon, wherein the light-transmitting member is for transmitting therethrough light to be received by, or light emitted from, an optical element chip.

Optical device cavity structure, optical device, and method for manufacturing an optical device cavity structure

Semiconductor device and method for the fabrication thereof grinding frame portion such that plural electrode constituent portions

A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip. Therefore, it becomes possible to prevent the occurrence of microcracks in the second semiconductor chip and to prevent the occurrence of defective fine metal wire connections caused by the impact at the time of electrical connection of the second semiconductor chip to the wiring board.

Semiconductor device and manufacturing method for the same

A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.

Semiconductor device

Disclosed is a semiconductor devicecomprising a first semiconductor elementwith an arrangement of first element electrodes, a second semiconductor elementwith an arrangement of second element electrodes, a connection memberelectrically connecting together a portionof the first element electrodesand the second element electrodes, an insulation layercovering a major surfaceof the first semiconductor elementand a backside surfaceof the second semiconductor element, a wiring layerformed on the insulation layerand electrically connected to the first element electrode portionexposed in an opening portion, and an external electrodeformed, as a portion of the wiring layer, on the insulation layer

Semiconductor device and method for the fabrication thereof

A semiconductor device includes a first semiconductor chip provided with a first electrode on a first main surface and a second semiconductor chip provided with a second electrode on a second main surface. The first and the second semiconductor chips are integrated so that the first and second main surfaces are opposed to one another and the first and second electrodes are electrically connected. The second semiconductor chip is polished from the opposite side of the second main surface so that the second semiconductor chip has a thickness smaller than the thickness of the first semiconductor chip.

Semiconductor device and manufacturing method thereof

Stacked semiconductor chips on a wiring board

A semiconductor wafer of the present invention includes: a plurality of semiconductor chip areas each of which is to be a semiconductor chip; and a cut-off area for separating the plurality of semiconductor chip areas from one another so as to obtain the semiconductor chips, wherein: an integrated circuit and an electrode pad connected to the integrated circuit are provided in each of the semiconductor chip areas; and a probe pad connected to the electrode pad is provided in the cut-off area.

Semiconductor wafer, semiconductor device, and method for manufacturing the same

A semiconductor device includes a semiconductor chip, an insulating layer formed on a region excluding the plurality of electrode pads on the principal surface of the semiconductor chip, a plurality of contact pads arranged on the insulating layer, a wiring layer electrically connected to at least one of the plurality of electrode pads and electrically connected to at least one of the plurality of contact pads, thereby establishing rewiring connection, an insulative resin layer formed on a region excluding the plurality of contact pads on the principal surface of the semiconductor chip, a protruded electrode provided on each of the plurality of contact pads, and an underfill material layer provided on the insulative resin layer in such a manner that the top of the protruded electrode is exposed.

Semiconductor device and method for producing the same, and method for mounting semiconductor device

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Osaka, Japan

Hiroaki Fujimoto