Oki Electric Industry Co., Ltd.

Sicoxs Corporation

Kabushiki Kaisha Toyota Jidoshokki

National Institute of Advanced Industrial Science and Technology

Oki Semiconductor Co., Ltd.

Hidetsugu Uchida

Akiyuki Minami

Ko Imaoka

Motoki Kobayashi

Takamitsu Kawahara

Kuniaki Yagi

Toyokazu Sakata

Naoki Hatta

Tomoatsu Makino

Toshihisa Shimo

Masao Okihara

Hiroaki Uchida

Hirotaka Mori

Hideki Takagi

Minoru Yoshida

Naokatsu Ikegami

Norio Hirashita

Toshio Nagata

Takanori Murasaki

Takeshi Yamamoto

Yuuichi Kurashima

Katsuji Yoshida

Takashi Ohsako

Guo-lin Liu

Yoshirou Tsurugida

Akihiko Ohara

Izumi Aikawa

Mitsuharu Kato

A technique related to a bonded semiconductor substrate capable of reducing an interface resistance is provided. The semiconductor substrate comprises a single-crystalline SiC substrate and a polycrystalline SiC substrate. The single-crystalline SIC substrate and the polycrystalline SiC substrate are bonded. A bonded region of the single-crystalline SiC substrate and the polycrystalline SiC substrate contains 1&#xd7;10(atoms/cm) or more of particular atoms.

Semiconductor substrate

A method for manufacturing a semiconductor substrate may comprise irradiating a surface of a first semiconductor layer and a surface of a second semiconductor layer with one or more types of first impurity in a vacuum. The method may comprise bonding the surface of the first semiconductor layer and the surface of the second semiconductor layer to each other in the vacuum. The method may comprise applying heat treatment to the semiconductor substrate produced in the bonding. The first impurity may be an inert impurity that does not generate carriers in the first and second semiconductor layers. The heat treatment may be applied such that a width of an in-depth concentration profile of the first impurity contained in the first and second semiconductor layers is narrower after execution of the heat treatment than before the execution of the heat treatment.

Semiconductor substrate and method for manufacturing semiconductor substrate

A technique disclosed herein relates to a manufacturing method for a semiconductor substrate having the bonded interface with high bonding strength without forming an oxide layer at the bonded interface also for the substrate having surface that is hardly planarized. The manufacturing method for the semiconductor substrate may include an amorphous layer formation process in which a first amorphous layer is formed by modifying a surface of a support substrate and a second amorphous layer is formed by modifying a surface of a single-crystalline layer of a semiconductor. The manufacturing method may include a contact process in which the first amorphous layer and the second amorphous layer are contacted with each other. The manufacturing method may include a heat treatment process in which the support substrate and single-crystalline layer are heat-treated with the first amorphous layer and the second amorphous layer being in contact with each other.

Manufacturing method for semiconductor substrate

An insulating film layer is formed between a channel region of an MOS element formed in a monocrystal silicon layer of an SOS substrate in which the monocrystal silicon layer is laminated on a sapphire substrate, and the sapphire substrate, thereby to bring a stress state of the monocrystal silicon layer on the insulating film layer into a tensile stress state.

Semiconductor device and manufacturing method thereof

A method for forming an insulating film is provided which is capable of inhibiting spontaneous growth of a silicon oxide film formed on a silicon substrate and an increase in thickness of a film caused by exposure to an atmosphere. After having allowed a silicon dioxide layer with a predetermined thickness to grow on a surface of a silicon crystal, a surface of the silicon dioxide is exposed to organic gas containing no hydroxyl group or is exposed to ammonia gas.

Method for forming insulating film and for manufacturing integrated circuit

A nonvolatile memory includes a charge transfer layer, having a low barrier height, between the floating gate electrode and the control gate electrode. Accordingly, the nonvolatile memory avoids the problem in which the number of program and erasure cycles is decreased as a result of degradation of a tunnel oxide film.

Nonvolatile memory

A field effect transistor and a method for forming the field effect transistor are made up of a source region which is formed on the substrate, a drain region which is formed on the substrate, a stepped portion which is formed in the substrate between the source region and the drain region, a gate insulating film which is formed on the stepped portion of the substrate, and a gate electrode which is formed on the gate insulating film, wherein, a thickness of the gate insulating film near the drain region, which is less than that of the gate insulating film on a channel region defined in the substrate between the source region and the drain region. Accordingly, the field effect transistor and a method for forming the field effect transistor can prevent degradation of transistor characteristics because of a hot carrier effect.

Field effect transistor

In order to achieve a method for analyzing the compositional distribution of deposited film adhering to the internal surface of a contact hole having a diameter in the deep submicron order, primary ions 18 are radiated into the surface 12a of an insulating film 12 where the contact hole 14 is formed to generate secondary ions 20. The primary ions are radiated into the surface of the insulating film from a constant diagonal direction. Then, mass spectrometry is performed on the resulting secondary ions to detect the compositional distribution of the deposited film 16 formed at the internal surface of the contact hole. Thus, the compositional distribution of the deposited film is ascertained over the depth-wise direction of the contact hole.

Method for testing semiconductor device

In a semiconductor memory device formed on a semiconductor substrate (11), a first FET (21) is formed on a substrate. A first polysilicon film (13) serves as a gate electrode of this first FET (21). A second polysilicon film (16) is formed over the first polysilicon film (13), being separated by an insulating film (15). A third polysilicon film (20) is formed on the top and sides of the second polysilicon film (16). The third polysilicon film (20) has an impurity-doped region (19). A lower end (20a) of the third polysilicon film (20) is in contact with the first polysilicon film (13). The first, second and third polysilicon films (13, 16, 20) form a second FET (22), with the second polysilicon film (16) forming a gate electrode, and that part of the third polysilicon film (20) which is between the impurity-doped region (19) and the contacting end (20a) and adjacent to the second polysilicon film (16 ) forming a channel.

Semiconductor memory device

A non-volatile semiconductor memory device includes a semiconductor substrate, and a source and a drain of a MOS transistor formed on one surface of the semiconductor substrate and spaced about from each other. First, second and third gates are formed on one side of the substrate through an insulating film and between the source and the drain of the MOS transistor. This memory device has one transistor construction and can be fabricated simply and finely.

Non-volatile semiconductor memory device

Growing community of inventors

Tokyo, Japan

Hidetsugu Uchida