Sumitomo Electric Industries, Limited

National University Corporation Nara Institute of Science and Technology

Hideto Tamaso

Keiji Wada

Hiromu Shiomi

Shunsuke Yamada

Takeyoshi Masuda

Kenji Fukuda

Hiroyuki Kitabayashi

Kazuhiro Fujikawa

Hidenori Kitai

Toru Hiyoshi

Shin Harada

So Tanaka

Yu Saitoh

Taku Horii

Yasuo Namikawa

Mitsuhiko Sakai

Tomoaki Hatayama

Takahiro Matsui

A method for producing a silicon carbide semiconductor device includes preparing a silicon carbide substrate, forming an insulating film on one main surface of the silicon carbide substrate, forming a contact hole in the insulating film and exposing the one main surface of the silicon carbide substrate at a bottom surface of the contact hole, forming an Si film on the bottom surface of the contact hole, forming an Ni film on the Si film, performing a first heat treatment at a first temperature at which Ni and Si react, after the forming of the Ni film, removing an unreacted portion of the Ni film that does not react with the Si film by wet etching after the first heat treatment, and performing a second heat treatment at a second temperature higher than the first temperature after the removing of the unreacted portion.

Method for producing silicon carbide semiconductor device and silicon carbide semiconductor device

A method for manufacturing a silicon carbide semiconductor device, includes the steps of depositing an insulating film on a principal surface of a silicon carbide substrate, forming a contact hole in the insulating film and exposing the principal surface, forming a Si film on bottom and a side surfaces of the contact hole, and a top surface of the insulating film, removing the Si film on the bottom surface of the contact hole and exposing the principal surface, depositing a Ni film on the bottom surface of the contact hole and the Si film, and performing a heat treatment to form a first alloy layer, which becomes an ohmic electrode, at the bottom surface of the contact hole by Si included in the substrate and the Ni film, and a second alloy layer at the top surface of the insulating film by the Si film and the Ni film.

Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device

The second conductivity type thin film includes: a high-concentration layer having a first impurity concentration; a first electric field relaxing layer continuous to the high-concentration layer at an outer circumference of the high-concentration layer, the first electric field relaxing layer having a second impurity concentration lower than the first impurity concentration; a second electric field relaxing layer continuous to the first electric field relaxing layer at an outer circumference of the first electric field relaxing layer, the second electric field relaxing layer having a third impurity concentration lower than the second impurity concentration; and a first electric field diffusion layer continuous to the second electric field relaxing layer at an outer circumference of the second electric field relaxing layer, the first electric field diffusion layer having a fourth impurity concentration lower than the third impurity concentration.

Semiconductor device

The current diffusion layer is interposed between the divided portions of the first base region. The second base region is provided adjacent to both sides of the trench current diffusion layer. The body region is provided on the trench current diffusion layer and the second base region. The source region is provided on the body region. The trench is provided to extend from a surface of the source region to the trench current diffusion layer through the source region and the body region. The trench has a bottom surface that is separated from and overlaps with the center portion of the first base region in a perpendicular direction. A width of the center portion in a horizontal direction is larger than a width of the bottom surface of the trench.

Silicon carbide semiconductor device

A method for manufacturing a silicon carbide semiconductor device includes preparing a silicon carbide layer including an n-type region having an n conductivity type and a p-type region having a p conductivity type, forming a material layer containing titanium, aluminum, and silicon on the n-type region and the p-type region, and forming an electrode layer in contact with the n-type region and the p-type region by heating the material layer. In forming a material layer, composition of the material layer is determined such that a point (x, y, z) (x, y, and z each being a numeric value greater than 0) representing a composition ratio among titanium, aluminum, and silicon is included in a first triangular pyramidal region having four points of the origin (0, 0, 0), a point (1, 2, 2), a point (2, 1, 2) and a point (2, 2, 1) as vertices.

A silicon carbide layer includes a drift region, a body region and a source region. The drift region constitutes a first main surface and has a first conductivity type. The body region is provided on the drift region, and has a second conductivity type. It is provided on the body region to be separated from the drift region, constitutes a second main surface, and has the first conductivity type. The silicon carbide layer is provided with a trench including a first side wall portion and a first bottom portion. The silicon carbide layer is embedded in the drift region to face the first bottom portion, and includes a second conductivity type region having the second conductivity type. The second conductivity type region is electrically connected to the source region.

Silicon carbide semiconductor device and method for manufacturing same

A silicon carbide semiconductor device includes: a silicon carbide off substrate including a main surface having an off angle relative to a basal plane, the main surface being provided with a trench, the trench having a plurality of side walls and a bottom portion; a gate insulating film covering the side walls and the bottom portion; and a gate electrode provided on the gate insulating film, each of the side walls having an angle of more than 65&#xb0; and not more than 80&#xb0; relative to the basal plane in the trench, opening directions of the plurality of side walls being all at a silicon plane side or a carbon plane side.

Silicon carbide semiconductor device having a trench with side walls and method for manufacturing same

A method for manufacturing a silicon carbide semiconductor device includes the following steps. There is prepared a first silicon carbide layer having a first main surface and a second main surface. A first recess including a side portion and a bottom portion is formed in the first main surface of the first silicon carbide layer. A second silicon carbide layer is formed in contact with the first main surface, the side portion, and the bottom portion. An image of a second recess formed at a position facing the first recess of the fourth main surface is obtained. Alignment is performed based on the image of the second recess. The first main surface corresponds to a plane angled off relative to a {0001} plane. A ratio obtained by dividing a depth of the first recess by a thickness of the second silicon carbide layer is more than 0.2.

Method for manufacturing silicon carbide semiconductor device

A method of manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate, forming a first electrode on the silicon carbide substrate, establishing ohmic contact between the silicon carbide substrate and the first electrode by irradiating the first electrode with laser beams, and forming a second electrode on the first electrode. In the step of establishing ohmic contact, a surface of the first electrode is irradiated with laser beams such that arithmetic mean roughness of a surface of the second electrode is not greater than 0.2 &#x3bc;m.

Method of manufacturing silicon carbide semiconductor device

A silicon carbide substrate having a main surface angled off in an off direction relative to a {0001} plane is prepared. A protruding first alignment mark is formed on the main surface of the silicon carbide substrate. A second alignment mark is formed on the first alignment mark by forming a silicon carbide epitaxial layer on the first alignment mark. The first alignment mark includes a first region and a second region, the second region being in contact with the first region and extending from the first region in the off direction. The second alignment mark includes a first portion formed on the first region and a second portion formed on the second region. An alignment step includes the step of capturing an image of the first portion while not including the second portion, and recognizing an edge of the first portion based on the image.

The present invention provides a silicon carbide semiconductor device having an ohmic electrode improved in adhesion of a wire thereto by preventing deposition of carbon so as not to form a Schottky contact, as well as a method for manufacturing such a silicon carbide semiconductor device. In the SiC semiconductor device, upon forming the ohmic electrode, a first metal layer made of one first metallic element is formed on one main surface of a SiC layer. Further, a Si layer made of Si is formed on an opposite surface of the first metal layer to its surface facing the SiC layer. The stacked structure thus formed is subjected to thermal treatment. In this way, there can be obtained a silicon carbide semiconductor device having an ohmic electrode adhered well to a wire by preventing deposition of carbon atoms on the surface layer of the electrode and formation of a Schottky contact resulting from Si and SiC.

A semiconductor device having a construction capable of achieving suppressed deterioration of electric characteristics in an insulating member is provided. An nSiC layer, a source contact electrode formed on a main surface of the nSiC layer, a gate electrode arranged at a distance from the source contact electrode on the main surface of the nSiC layer, and an interlayer insulating film located between the source contact electrode and the gate electrode are provided. A rate of lowering in electric resistance in the interlayer insulating film when heating to a temperature not higher than 1200 &#xb0; C. is carried out while the source contact electrode and the interlayer insulating film are adjacent to each other is not higher than 5%.

A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300&#xb0; C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.

Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device includes the steps of: preparing a substrate made of silicon carbide; forming, on one main surface of the substrate, a detection film having a light transmittance different from that of silicon carbide; confirming presence of the substrate by applying light to the detection film; and forming an active region in the substrate whose presence has been confirmed.

A silicon carbide semiconductor device includes a silicon carbide substrate and a contact electrode. The silicon carbide substrate includes an n type region and a p type region that makes contact with the n type region. The contact electrode makes contact with the n type region and the p type region. The contact electrode contains Ni atoms and Si atoms. The number of the Ni atoms is not less than 87% and not more than 92% of the total number of the Ni atoms and the Si atoms. Accordingly, there can be provided a silicon carbide semiconductor device, which can achieve ohmic contact with an n type impurity region and can achieve a low contact resistance for a p type impurity region, as well as a method for manufacturing such a silicon carbide semiconductor device.

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Osaka, Japan

Hideto Tamaso