Hitachi-high-technologies Corporation

Hitachi, Ltd.

Hidemitsu Naya

Rikio Tomiyoshi

Mutsumi Kikuchi

Yasutaka Toyoda

Ryoichi Matsuoka

Takumichi Sutani

Koji Hashimoto

Shigeo Moriyama

Kotaro Shimamura

Akiyuki Sugiyama

Yoshitaka Takahashi

Takashi Hotta

Masahiko Saito

Keiichiro Ohkawa

Yuichiro Morita

Takamichi Hoshino

Takanori Yokoyama

Fumio Narisawa

Takahiro Hatori

Masamichi Kawano

Akira Karakama

Yuji Sugaya

Koji Kawaki

Takuya Shirato

Hideyuki Okamoto

A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.

Method and apparatus of pattern inspection and semiconductor inspection system using the same

There is provided a pattern inspection apparatus that is capable of detecting a defect accurately and efficiently to inspect a pattern of a semiconductor device. The pattern inspection apparatus includes: a contour extraction means for extracting contour data of a pattern from a captured image of the semiconductor device; a non-linear part extraction means for extracting a non-linear part from the contour data; an angular part extraction means for extracting an angular part of a pattern from design data of the semiconductor device; and a defect detection section that compares a position of the non-linear part extracted by the non-linear part extraction section with a position of the angular part extracted by the angular part extraction section so as to detect a position of a defective part of a pattern.

Pattern inspection apparatus and semiconductor inspection system

An inspected image can be communicated without putting large load on a network. A remote console enables an operation screen and a moving image to be displayed and processed without color shifts. Information on the operation screen is not communicated as bitmap information, but event information such as a formation of a window and the moving of a mouse is communicated as information at a level of I parts of graphical user interface. Moreover, communication of the event information on the operation screen and communication of a moving image are separated. In addition, a method of compressing information on the operation screen and a method of compressing information on the moving image are separated. A necessary part of information on the moving image is selected and communicated depending on the state of the semiconductor inspection apparatus, an operation of an operator, and a pattern to be inspected.

Semiconductor inspection apparatus

A semiconductor production system has a semiconductor manufacturing apparatus having an exposure unit, a control unit for controlling the exposure unit and a storage device; a semiconductor inspection apparatus having an observation unit, a control unit for controlling the observation unit and a storage device; and a storage device commonly used by the semiconductor manufacturing apparatus and the semiconductor inspection apparatus. The manufacturing apparatus, the inspection apparatus and the commonly used storage device are interconnected via a storage area network. With the semiconductor manufacturing apparatus and the storage device linked together via the storage area network, a large volume of image data or design data can be communicated at high speed, thus improving the system throughput.

Semiconductor production system

A semiconductor manufacturing apparatus includes: a calculation unit having at least one computer for processing semiconductor design information; a control unit for controlling radiation of an electron in accordance with a processing result of the semiconductor design information; a writing unit for radiating an electron in accordance with instructions of the control unit; and at least one storage device. The semiconductor manufacturing apparatus permits a communication between the storage device, the calculation unit, the control unit, and the writing unit. The semiconductor manufacturing apparatus further includes a communication pass through which the storage device can be controlled.

Semiconductor manufacturing apparatus

A semiconductor production system has storage devices for storage of all kinds of information including, but not limited to, the information concerning semiconductor design and information as to semiconductor manufacture along with information relating to semiconductor inspection processes, while representing as a class an instance added with meta data indicative of the role of the information in accordance with a logical expressive form. The system has a network for the storage device use, called the storage area network or 'SAN'. The SAN is for interconnection between respective ones of the storage devices, semiconductor manufacturing apparatuses and a semiconductor inspection apparatus. The storage devices are seamlessly accessible from any one of the semiconductor manufacture apparatuses and the semiconductor inspection apparatus and also from a semiconductor design environment associated therewith.

Consumption power control is provided for a system LSI made of a combination of a plurality of reusable logic circuit modules, i.e., Intellectual Property (IP) cores. Hardware resources such as interfaces and registers for the consumption power control of other IP cores are prepared and controlled by software for the consumption power control of a system LSI. The consumption power can be controlled at an IP core level. A method is provided which facilitates a system LSI designer to enter a consumption power control specification of a system LSI when the system LSI is configured.

Logic circuit module having power consumption control interface and a recording medium storing the module

A code generation system is provided which optimizes a code generation for a control system applicable to an embedded control system without the need to increase its memory capacity. A total control unitcauses to read a model diagram and an operation diagram which depict a software specification stored in a memory, and starts specification analysis unitto execute lexical and grammatical analyses thereof. Then, object-oriented function removing unitis started to determine any function which is not used according to a function select item stored in the memory. Then, code generation unitis started to generate a code on the basis of the result of the lexical and grammatical analyses of the software specification, and of an output code pattern determined by the object-oriented function removing unit

Object oriented optimizing code generator with user selection of use or do not use for dynamic generation of functions

A cache memory apparatus is provided with a cache memory for storing thereinto at least one of information about an instruction group related to a system control and information about a data group, an address managment table for managing both an address and a range with respect to the cache memory into which the information is stored, and a selection circuit for selecting the cache memory in response to an access to the address management table. As a result, information related to a system control is stored into the cache memory apparatus.

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Hidemitsu Naya