Industrial Technology Research Institute

Kenmec Mechanical Engineering Co., Ltd.

Heng-Chieh Chien

Yu-Lin Chao

Ming-Ji Dai

Shu-Jung Yang

Chun-Kai Liu

Sheng-Tsai Wu

John H Lau

Ra-Min Tain

Chih-Ming Shen

Chih-Yao Wang

Yu-Min Lin

Chih-Kuang Yu

Wei-Chung Lo

Chih-Chung Chiu

Feng-Hsiang Lo

Jing-Yi Huang

Ming-Che Hsieh

Yao-Shun Chen

Li-Ling Liao

Huey-Lin Hsieh

Wen-Fu Hsu

Sheng-Liang Li

Ker-Win Wang

Yen-Lin Tzeng

Yan-Bo Lin

Jui-Feng Hung

Chia-Wei Jui

Yu-Long Lu

Kuei-Yuan Huang

An antenna-in-package with a heat dissipation structure includes a circuit board, an antenna substrate, a chip, a plurality of heat dissipation fins, a chassis, and dielectric fluid. The circuit board has a first surface and a second surface opposite to the first surface. The antenna substrate is disposed above the first surface of the circuit board. The chip is disposed between the antenna substrate and the first surface of the circuit board and is electrically connected to the antenna substrate. The plurality of heat dissipation fins protrude from the second surface of the circuit board. The chassis encapsulates the circuit board, the antenna substrate, the chip, and the plurality of heat dissipation fins. The dielectric fluid circulates and flows in the chassis through a cooling circulation device and is in direct contact with the plurality of heat dissipation fins.

Antenna-in-package with heat dissipation structure

A radiator and an immersion tank using the radiator is provided. The immersion tank includes a first condensation tank and the radiator. Multiple motherboards and a first working fluid are located in the first condensation tank. The radiator includes a condensation assembly and multiple heat exchanger parts. The condensation assembly is assembled outside the first condensation tank along a first direction, wherein the condensation assembly has a second condensation tank, and the second working fluid flows through the second condensation tank. Each heat exchanger part extends along the first direction, a first end of the heat exchanger part is plugged into the first condensation tank, and a second end of each heat exchanger part is plugged into the condensation assembly.

Radiators and immersion tanks using the same

A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer. The circuit substrate is electrically connected to the second redistribution structure layer of the package assembly through the connectors.

Heterogeneous integration semiconductor package structure

An ear tag module includes a rod member, a spike, a circuit component, and a temperature sensor. The spike is disposed on one side of the rod member, and the circuit component is disposed on another side of the rod member. The temperature sensor is electrically connected to the circuit component. When the spike penetrates an ear, the ear is in contact with a sensing area of the rod member, and the temperature sensor is located in the rod member to detect a temperature of the ear and transmit at least one temperature sensing information to the circuit component.

Ear tag module

A chip temperature computation method and a chip temperature computation device are provided. The chip temperature computation method includes: computing an upper layer thermal resistance and a lower layer thermal resistance of a chip, computing a total thermal resistance of the chip, and computing a temperature of the chip according to the total thermal resistance.

Chip temperature computation method and chip temperature computation device

A rail-type organic light emitting diode lamp assembly is provided. The lamp assembly includes a lamp module, an annular member, a connector, a conductive member, and a rail module. The annular member includes a protrusion portion having a pair of indentations. The connector is connected to the annular member, and includes a through hole, a first end provided with a pair of ears and a second end provided with a pair of hooks. The conductive member is provided in the through hole and has a first end in contact with the annular conductive coil. The rail module is connected with the connector and includes a conductor in contact with a second end of the conductive member. The connector can be slidably hooked to the rail module through the hooks, and after the ears are inserted into the indentations, the annular member can be rotatable with respect to the connector.

Rail-type OLED lamp assembly

A power module and a manufacturing method thereof are provided, and the power module includes a carrier substrate, an interconnection layer, a first chip, a second chip, a ceramic bonding substrate, a top interconnection layer and a lead frame. The interconnection layer is disposed on the carrier substrate. The first chip and the second chip are disposed on the interconnection layer, and electrically connected to the interconnection layer. The ceramic bonding substrate is disposed on the interconnection layer, and is disposed in between the first chip and the second chip so as to separate the first chip from the second chip. The top interconnection layer is disposed on the ceramic bonding substrate, covers the first chip and the second chip, and is electrically connected to the first chip and the second chip. The lead frame is disposed on the top interconnection layer and electrically connected to the top interconnection layer.

Power module and manufacturing method thereof

A measurement method, a measurement apparatus, and a computer program product for measuring a thermoelectric module are provided. A temperature is provided to the thermoelectric module. A current is applied to the thermoelectric module to turn both sides of the thermoelectric module into a hot side and a cold side. The temperature of the hot side is higher than that of the cold side. A terminal voltage of the thermoelectric module, a hot side temperature of the hot side, and a cold side temperature of the cold side are measured at different time points. A thermoelectric relationship between the terminal voltages and differences between the hot side temperatures and the corresponding cold side temperatures is obtained according to the terminal voltages, the hot side temperatures, and the cold side temperatures. At least one first parameter of the thermoelectric module is estimated according to the thermoelectric relationship.

Measurement method, measurement apparatus, and computer program product

A power module includes a first substrate, at least two power elements, at least one first conductive structure and at least one leadframe. The first substrate includes a dielectric frame, two first fan-out circuit structure layers and two dielectric plates. The two first fan-out circuit structure layers are respectively disposed on two opposite surfaces of the dielectric frame, the two dielectric plates are respectively disposed on the two first fan-out circuit structure layers, each of the dielectric plates has at least one opening, and the opening and the corresponding first fan-out circuit structure layer form a concavity. The two power elements are respectively embedded in the two concavities. The two power elements are electrically connected to each other through the first conductive structure. The leadframe disposed at the first substrate is electrically connected to the two power elements, and is partially extended outside the first substrate.

Power module

A thinned integrated circuit device and manufacturing process for the same are disclosed. The manufacturing process includes forming a through-silicon via (TSV) on a substrate, a first terminal of the TSV is exposed on a first surface of the substrate, disposing a bump on the first surface of the substrate to make the bump electrically connected with the TSV, disposing an integrated circuit chip (IC) on the bump so that a first side of the IC is connected to the bump, disposing a thermal interface material (TIM) layer on a second side of the IC opposite to the first side of the IC, attaching a heat-spreader cap on the IC by the TIM layer, and backgrinding a second surface of the substrate to expose the TSV to the second surface of the substrate while carrying the heat-spreader cap.

Thinned integrated circuit device and manufacturing process for the same

A self-assembly apparatus for assembling a plurality of devices with a predetermined aspect ratio is provided. The self-assembly apparatus includes a guiding element, a vibration device, and a magnetic field inducing device. The guiding element has a mesh structure. The vibration device is coupled to the guiding element and configured to vibrate the guiding element. The magnetic field inducing device is disposed below the guiding element and configured to generate a time-varying magnetic field to rotate each of the devices. Through a collective effect of the vibration of the guiding element, the time-varying magnetic field, and the self-gravity of each of the devices, the devices are positioned on a plate between the guiding element and the magnetic field inducing device through the mesh structure.

Self-assembly apparatus, device self-assembling method, and method of assembling thermoelectric devices

A chip stacking structure including a carrier, a first redistribution layer, a second redistribution layer, at least one first chip, at least one second chip, and at least one conductor is provided. The carrier has a first surface and a second surface opposite to each other. The carrier has at least one through hole. The first and second redistribution layers are disposed on the first and second surfaces of the carrier, respectively. The first and second chips are disposed on the first and second surfaces of the carrier and electrically connected with the first and second redistribution layers, respectively. The conductor is disposed on one of the first and second chips. The conductor is disposed in the through hole. The first and second chips are electrically connected by the conductor. A gap is formed between the conductor and an inner wall of the carrier which surrounds the through hole.

Chip stacking structure and fabricating method of the chip stacking structure

By adding particles of high thermal conductivity and low thermal expansion coefficient into the copper as a composite material and filling with the composite material into the through-via hole, the mismatch of the coefficient of thermal expansion and the stress of the through-silicon via are lowered and the thermal conductivity of the through-silicon via is increased.

Filled through-silicon via with conductive composite material

An apparatus for measuring a characteristic and a chip temperature of an LED includes a thermal conductive component. An LED chip is disposed on the thermal conductive component. A temperature control unit is connected to the thermal conductive component for providing a temperature to the thermal conductive component, and therefore providing the temperature to the LED chip via the thermal conductive component. A power-source and voltage-meter unit provides a current to the LED chip, and measures a voltage value of the LED chip. Under a measurement mode, the current is featured with a current waveform having a high current level and a low current level which are alternatively changed, for applying to the LED chip. Measurements are conducted respectively corresponding to the high current level and the low current level, and a correlation curve between the voltage and the temperature can be obtained with the results of measurement.

Growing community of inventors

Taipei, Taiwan

Heng-Chieh Chien