Avago Technologies General IP (singapore) Pte. Ltd.

Marvell International Technology Ltd

Avago Technologies General IP Pte, Ltd.

Haoran Duan

Charles Edward Evans

Michael Alvin Rencher

James Richard Emmert

A system and method of testing IP cores contained in a system-on-chip integrated circuit is disclosed. An operation command is received on an input/output port of the circuit. The operation command includes an operation code component, data component(s), and expected time component. The received operation command is processed to supply test data to each of the IP cores being tested. Result data is received in response to the supplied test data from each of the IP cores being tested. The result data is processed and from the processed result data is generated a status data packet. The status data packet includes the operation code component and a status flag component and is provided on the input/output port.

On-chip test circuit and method for testing of system-on-chip (SOC) integrated circuits

A semiconductor die includes a plurality of drivers and a plurality of bonding pads. Each driver is formed by a plurality of interconnected modules and has an associated bonding pad to which at least one of the modules of the driver is electrically connected. The modules of some of the drivers are positioned outside of the associated bonding pad toward a periphery of the die. The bonding pads may be arranged, for example, in a double- or triple-staggered pattern around the periphery of the die.

Modular bonding pad structure and method

A method for implementing package-level intellectual property (PLIP) preverification for system on chip (SOC) devices includes providing at least one externally connected intellectual property (IP) core with an SOC. A package generic unit is provided with the IP core and is configured for providing external interface functions with respect to the SOC, wherein said package generic unit is pre-verified in silicon and independent of the specific packaging of the SOC. A package adaptation unit is provided with the IP core and is configured for providing external interface functions with respect to the SOC, wherein the package adaptation unit is pre-verified in silicon and dependent upon the specific packaging of the SOC.

Growing community of inventors

Corvallis, OR, United States of America

Haoran Duan