Sandisk Corporation

Grace Semiconductor Manufacturing Corporation

Hao Fang Fang

Masaaki Higashitani

Gerrit Jan Hemink

Tuan Duc Pham

Jung-Cheng Kao

A NAND flash memory device incorporates a unique booster plate design. The booster plate is biased during read and program operations and the coupling to the floating gates in many cases reduces the voltage levels necessary to program and read the charge stored in the gates. The booster plate also shields against unwanted coupling between floating gates. Self boosting, local self boosting, and erase area self boosting modes used with the unique booster plate further improve read/write reliability and accuracy. A more compact and reliable memory device can hence be realized according to the present invention.

Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices

Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices

A method of forming poly insulator poly capacitors by using self-aligned salicide process for mixed mode analog devices. These capacitors are formed in the self-aligned salicide process as stacked poly insulator poly (PIP) capacitors. In the self-aligned salicide process, a self-aligned salicide block process is needed to protect the the salicide formation process from electrostatic discharge (ESD) devices such as resistors or capacitors. The oxide layer of the self-aligned salicide block is used as the dielectric layer of the capacitors to form the PIP capacitor. Therefore, some process steps are omitted due to the formation of the PIP capacitors.

Method of forming poly insulator poly capacitors by using a self-aligned salicide process

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Shanghai, China

Hao Fang Fang