Mitsubishi Denki Kabushiki Kaisha

Hajime Kimura

Kenji Kawai

Kazuyuki Ohmi

Shigenori Sakamori

Kazumasa Yonekura

Satoshi Ogino

An attempt is made to achieve an upward leap in the capacitance of a capacitor of MIM structure and further improvements in the reliability of a semiconductor device. A method of manufacturing a semiconductor device has a step of forming an amorphous silicon film on the surface of a lower electrode of a capacitor, a step for roughening the silicon film, to thereby form rough polysilicon, and a step for etching metal film of a lower electrode while the rough polysilicon is taken as a mask, thereby roughening the surface of the lower electrode. Through the foregoing steps, the surface of a lower electrode of a capacitor of MIM (metal/insulator/metal) structure is formed roughly, thereby increasing the surface area of the capacitor. Thus, a large-capacitance capacitor of MIM structure can be fabricated.

Semiconductor device, and method of manufacturing the semiconductor device

A polycrystalline silicon film and tungsten silicide film are formed on a silicon substrate . An insulating film to be a hard mask is formed on tungsten silicide film . A photoresist pattern is formed on the insulating film. The insulating film is anisotropically etched using photoresist pattern as a mask. By etching the exposed side surface of insulating film in a gas phase hydrofluoric acid ambient, a hard mask is formed. Thus, a mask material with a desired dimension is obtained without causing any variation in thickness of the mask material, and the layer to be the mask material is prevented from coming off the semiconductor substrate.

Method of manufacturing semiconductor device

A non-volatile semiconductor memory device and a manufacturing method of the same where an etching residue generating short-circuit between gates is made harmless or a device is miniaturized are obtained. The method includes the steps of forming on a semiconductor substrate, a first gate layer and a second gate layer, forming a second gate electrode by etching the second gate layer, forming a first gate electrode by etching the first gate layer using the second gate electrode as a mask, and removing a residue left on a step portion by isotropic etching.

Non-volatile semiconductor memory device and manufacturing method thereof

Provided is a plasma processing apparatus capable of extending an etching parameter to reduce charge-up shape anomalies in dry etching and to enhance etching performance such as selectivity, uniformity, processability or the like. A microwave is controlled to be modulated in frequency and is introduced into a chamber. An ECR face is moved between two positions according to the frequency of the microwave.

Plasma processing apparatus

A first gate oxide film is formed on a surface of a silicon substrate. A first polycrystalline silicon film is formed on the first gate oxide film, and patterned so that its side surface is tapered. Silicon oxide film exposed through the first polycrystalline silicon is removed, and a second silicon oxide film having film thickness different from that of the first silicon oxide film is formed by thermal oxidation. Thus, dual gate oxide is manufactured. Accordingly, a method of manufacturing a semiconductor device is provided which can improve reliability of the transistor and can improve production yield, by suppressing generation of foreign matters.

Growing community of inventors

Hyogo, Japan

Hajime Kimura