Samsung Electronics Co., Ltd.

Hai Jeong Sohn

Young Hee Song

Do Soo Jeong

Dong Ho Lee

Young Do Kweon

Hyeon J Jeong

Sung Min Sim

Jun Young Jeon

Dual-lead type substantially square semiconductor packages and dual in-line memory modules using them are disclosed. The conventional memory module is internationally standardized, so it is hard to increase memory density by adding current packages to the module. The substantially square semiconductor packages provide improved and smaller packages in which a package length and a pin pitch are reduced, so that the memory density is increased without modifying a module size. The length of the leads are preferably substantially equal.

Dual-lead type square semiconductor package and dual in-line memory module using the same

A method for manufacturing a chip scale package comprises preparing a tape wiring board that includes a polyimide tape having top and bottom surfaces, Cu traces formed on the bottom surface of the tape, a window formed in the tape to enable the Cu traces to be connected to a semiconductor chip attached below the board, multiple connection holes formed in the tape to expose portions of the Cu traces therethrough and define solder ball mounting pads, and an elastomer chip carrier attached to the bottom surface of the tape. The method includes applying either a pre-flux or a cover sheet over the solder ball mounting pads. The pre-flux and the cover sheet each prevents the solder ball mounting pads being plated with gold. This, in turn, prevents the formation of intermetallic compounds in the solder balls so that the bond strength between the solder balls and a pad to which they attach is improved.

Method for manufacturing a chip scale package having copper traces selectively plated with gold

A method for bonding a semiconductor chip to a lead frame in a LOC type semiconductor package in which a plurality of inner leads are bonded to an active surface of the semiconductor chip. A semiconductor chip is prepared with a partially-cured polyimide layer on the active surface. One or more strips of polyimide tape is attached to the inner leads. The semiconductor chip is attached to the inner leads by making an intermediate pressure bond between the polyimide tape and the partially-cured polyimide coating layer on the active surface. The polyimide coating layer is then cured.

Lead-on-chip semiconductor package and method for making the same

Lead frames for semiconductor chips include spaced apart tie-bars which extend to contact and support the semiconductor chip. Adhesive is used between the tie-bars and the chip to adhesively couple the tie-bars to the chip. The lead frame leads therefore need not be used to adhesively couple the chip to the lead frame, thereby reducing or eliminating the need for equal spacing and close coupling of the leads, and reducing or preventing problems caused by deterioration of adhesive on the leads. The tie-bars may include polyimide tape or liquid adhesive held in cups. During fabrication, a semiconductor chip is mounted on the adhesive material, such that the tie-bars mechanically support the semiconductor chip and the lead ends extend adjacent the semiconductor chip. The lead ends are then electrically connected to the semiconductor chip and the package is encapsulated.

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Kyungki-do, South Korea

Hai Jeong Sohn