United Microelectronics Corp.

H C Yu

Hsi-Mao Hsiao

Chun-Lung Chen

Hsi-Chin Lin

Wen-Shan Wei

Ming-Sheng Kuo

A method of fabricating a semiconductor device is described in which an insulation layer is formed over the gate electrode and the substrate. This insulation layer is anisotropically etched away except for a portion surrounding the sidewall of the gate electrode to form a spacer. The tip of the spacer is at the same height as the upper surface of the liner layer and is lower than the upper surface of the gate electrode, therefore, resulting in an increase of the exposed area of the gate electrode surface.

Method of fabricating a semiconductive device

The invention describes a method for fabricating an inter-layer dielectric layer. In this method, a plurality of first polysilicon lines, a first inter-layer dielectric layer, and a plurality of second polysilicon lines are formed in sequence on the substrate. A second inter-layer dielectric layer is formed between the plurality of second polysilicon lines and entirely covers the plurality of second polysilicon lines. Afterwards, a spin-on glass layer is formed on the second inter-layer dielectric layer, and then, while using the upper surfaces of the second polysilicon lines as etch end points, the spin-on glass layer and the second inter-layer dielectric layer are etched back to entirely remove the spin-on glass layer and partially remove the second inter-layer dielectric layer over the second polysilicon lines. Subsequently, a cover layer is formed to cover the second polysilicon lines and the remainder of the inter-layer dielectric layer. Finally, an oxide layer is formed to cover the resulting structure.

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Yi-Lan Hsien, Taiwan

H C Yu