Industrial Technology Research Institute

Gwo-Sheng Huang

Her-Ming Jong

Wen-Kuang Su

Chao-Hui Hsu

Yee-Lu Zhaog

An improved parallel-serial multiplier and accumulator for multiplying a digital multiplicand and a multiplier resulting in a product that is added to an accumulator input. The parallel-serial multiplier and accumulator includes a parallel-serial multiplier and a digit serial adder. The parallel-serial multiplier includes a recoder for receiving the digital multiplier and outputting an ordered sequence of recoded words, a partial product generator for generating partial products that are dependent upon the digital multiplicand and upon each of the ordered sequence of recoded words, and an adder for adding the partial products to provide the product. The adder outputs a digit serial word that contains the least significant bits of an intermediate sum of the partial products as the partial products are being added. The digit serial adder includes a carry save adder that receives the product and the accumulator input to produce the output sum.

Parallel-serial multiplier and accumulator

A modified least mean squares adaptive filter method and apparatus is disclosed. The filter coefficients used to perform the FIR multiplications in a least mean squares adaptive filter are time dependent upon a time index. Each tap of the FIR section utilizes a coefficient at a different time index. This allows an implementation in hardware that is modular and easy for implementation in VLSI technologies. In addition, an improve multiplier and accumulator is disclosed for use in implementing the improved least squares adaptive filter.

Pipelined parallel-serial architecture for a modified least mean square

The present invention discloses a data processing module for generating an interpolated output from four sampled input data. The data processing module includes an input means, i.e., a memory module, for receiving the four sampled input data. The data processing module further includes a pseudo four-point interpolation (PFPI) module for receiving a ratio value p and for generating the interpolated output by utilizing a novel pseudo four-point interpolation algorithm as represented by an Equation (6).

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Hsinchu, Taiwan

Gwo-Sheng Huang