Stats Chippac Pte. Ltd.

GwangTae Kim

WonJun Ko

HeeSoo Lee

OhHan Kim

Hun Teak Lee

MinJung Kim

SeungYong Chai

KeoChang Lee

Seong Won Park

Kenny Lee

ChangHwan Kim

ByungHyun Kwak

WoonJae Beak

A system and method of manufacture of an integrated circuit packaging system includes: a copper film; a first metal layer directly on the copper film; an insulation layer directly on and over the first metal layer, the insulation layer having a via hole through the insulation layer; a conductive via within the via hole and directly on the first metal layer; a second metal layer directly on the conductive via and the insulation layer; a copper post directly on the copper film; a solder pad over the copper post; and an interposer coupled to the copper post and the solder pad.

Integrated circuit packaging system with plated copper posts and method of manufacture thereof

A warpage test system uses a calibration block to calibrate the warpage test system over a temperature profile. The calibration block includes a first metal block bonded to a second metal block. The first metal block includes a first metal and a second different metal. The first metal block includes a CTE different than a CTE of the second metal block. The calibration block is disposed in the warpage test system. A warpage of the calibration block is measured over a temperature profile ranging from 28&#xb0; C. to 260&#xb0; C. A deviation between the measured warpage of the calibration block and a known thermal expansion of the calibration block over the temperature profile is recorded. The warpage measurement in a semiconductor package is compensated by the deviation between the measured warpage of the calibration block and the known thermal expansion or warpage of the calibration block over the temperature profile.

Semiconductor device and method of calibrating warpage testing system to accurately measure semiconductor package warpage

Simultaneous semiconductor packages can be produced using a dual-sided film-assist molding process. The process involves using a film or membrane having opposing surfaces for receiving un-encapsulated semiconductor packages on both surfaces. A slot can be formed in the film or membrane to facilitate introduction and passage of the encapsulation therethrough such that upon removal of the film or membrane, increased throughput and productivity of the completed semiconductor packages can be carried out to achieve considerable cost savings.

Dual-sided film-assist molding process

Growing community of inventors

Seoul, South Korea

GwangTae Kim