Applied Materials, Inc.

Other

Guangxiang Jin

Ajay Kumar

Padmapani Nallan

Jeng H Hwang

Wei Liu

Harald Herchen

James S Papanu

Xikun Wang

Meihua Shen

Mark Naoshi Kawaguchi

David Palagashvili

Xiaoyi Chen

Kang-Lie Chiang

Scott M Williams

Ralph Kerns

Uwe Leucke

Haojiang Chen

A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.

Method of plasma etching of high-K dielectric materials

Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.

Etch methods to form anisotropic features for high aspect ratio applications

A method of plasma etching a layer of dielectric material having a dielectric constant that is greater than four (4). The method includes exposing the dielectric material layer to a plasma comprising a hydrocarbon gas and a halogen containing gas.

Method of plasma etching high-K dielectric materials with high selectivity to underlying layers

A method for preventing electrical short circuits in a multi-layer magnetic film stack comprises providing a film stack that includes a layer of magnetic material having an exposed surface. A protective layer is deposited on the exposed surface of the magnetic layer. The protective layer may comprise, for example, a fluorocarbon or a hydrofluorocarbon. The film stack is etched and the protective layer protects the exposed surface from a conductive residue produced while etching the film stack. The method may be used in film stacks to form a magneto-resistive random access memory (MRAM) device.

Method of preventing short circuits in magnetic film stacks

A method and apparatus for etching a magnetic memory cell stack are described. More particularly, HCl is used as a main etchant gas for etching a magnetic memory cell stack. HCl is used in part to reduce corrosion and improve selectivity. Additionally, use of an amorphous carbon or hydrocarbon based polymer resin for a hard mask is described, as well as a post-etch passivation with a water rinse, a water vapor plasma treatment or an ammonia plasma treatment. Moreover, in an embodiment, a diffusion barrier layer dispose most of the magnetic memory cell stack is etched with hydrogen and fluorine containing gas in a separate process chambers.

Etching methods for a magnetic memory cell stack

A method of etching high dielectric constant materials using halogen gas and reducing gas chemistry. An embodiment of the method is accomplished using a 20 to 300 sccm of chlorine and 2 to 200 sccm of carbon monoxide, regulated to a total chamber pressure of 2-100 mTorr to etch a hafnium oxide layer.

Method of plasma etching of high-K dielectric materials with high selectivity to underlying layers

A method of fabricating a gate structure of a field effect transistor comprising processes of forming an &agr;-carbon mask and plasma etching a gate electrode and a gate dielectric using the &agr;-carbon mask. In one embodiment, the gate dielectric comprises hafnium dioxide.

Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask

A simple method of forming a cup capacitor is disclosed. The method typically involves only &ldquo;dry&rdquo; deposition and etching steps, allowing applicants' method to be performed in a single processing apparatus, if so desired. The method includes the following steps: a) providing a semiconductor structure including a dielectric layer overlying a semiconductor substrate, wherein a cup is present in the dielectric layer, the cup having an opening at an upper surface of the dielectric layer; b) depositing a conformal layer of a conductive material over the dielectric layer, including the sidewalls and bottom of the cup; c) depositing a layer of a sacrificial material over the conductive material, in an amount sufficient to fill the cup; d) removing sacrificial material present on an upper surface (field surface) of the conductive layer outside of and adjacent to the cup by plasma etching, using a plasma source gas which selectively etches the sacrificial material relative to the conductive material; e) removing conductive material present on an upper surface (field surface) of the dielectric layer outside of and adjacent to the cup by plasma etching, using a plasma source gas which selectively etches the conductive material relative to the sacrificial material remaining inside of the cup; and f) removing sacrificial layer material remaining inside of the cup by etching, using an etchant which selectively etches the sacrificial material inside of the cup relative to the conductive material inside of the cup.

Method of forming a cup capacitor

A method of processing a substrate comprises exposing the substrate to an energized process gas to etch features on the substrate and exposing the substrate to an energized cleaning gas to remove etchant residue and/or remnant resist from the substrate . To enhance the cleaning process, the substrate may be treated before, during or after the cleaning process by exposing the substrate to an energized treating gas comprising a halogen species.

Substrate cleaning apparatus and method

Method for removing or inactivating corrosion-forming etch residues remaining on the surface of a dielectric material after etching a metal layer which is supported by the dielectric material. The surface of the dielectric material which supports the corrosion-forming etch residues is post-etch treated in order to remove the corrosion-forming etch residues. Post-etch treating of the surface of the dielectric material includes disposing the dielectric material in a vacuum chamber having microwave downstream treating gas plasma, or contacting the surface of the dielectric material with deionized water.

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San Jose, CA, United States of America

Guangxiang Jin