Applied Materials, Inc.

Applied Material, Inc.

Gongda Yao

Zheng Xu

Peijun Ding

Gene Y Kohara

Fusen E Chen

Hong Zhang

Tony P Chiang

Barry Lee Chin

Suraj Rengarajan

Hougong Wang

Jianming Fu

John C Forster

Xianmin Tang

Praburam Gopalraja

Peter Satitpunwaycha

Hoa Thi Kieu

Fernand Dorleans

Michael Nam

Shri Singhvi

Steve Lai

Sophia Lee

Chris Cha

Edwin Kim

Mei Yin Chang

Michael Xiaoxuan Yang

Hua Chung

Ling Chen

Liubo Hong

Vincent W Ku

Wei Ti Lee

Ted Tie Guo

Hyman J Levinstein

Kenny King-tai Ngan

Kenny King-Tai Ngan

Gilbert Hausmann

Nitin Khurana

Srinivas Guggilla

Jingang Su

Zhang Xu

Martin Kranz

We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.

Method for depositing a diffusion barrier layer and a metal conductive layer

We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.

A method of depositing a metal seed layer with underlying barrier layer on a wafer substrate comprising a plurality of recessed device features. A first portion of the barrier layer is deposited on the wafer substrate without excessive build-up of barrier layer material on the openings to the plurality of recessed device features, while obtaining bottom coverage without substantial sputtering of the bottom surface. Subsequently, a metal seed layer is deposited using the same techniques used to deposit the barrier layer, to avoid excessive build up of metal seed layer material on the openings to the features, with minimal sputtering of the barrier layer surface.

Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features

We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of a copper seed layer on a wafer substrate without excessive build-up on the openings of each of the plurality of recessed device features, while obtaining bottom coverage without substantial sputtering of the bottom surface. The method also comprises depositing a second portion of the metal seed layer while redistributing at least a portion of the bottom coverage material to the sidewalls of each recessed device feature, to provide a uniform seed layer coverage over the interior surface of the recessed device features.

Method of depositing a uniform metal seed layer over a plurality of recessed semiconductor features

We disclose a method of depositing a metal seed layer on a wafer substrate comprising a plurality of recessed device features. The method comprises depositing a first portion of the metal seed layer on the wafer via plasma deposition at a sufficient ratio of wafer substrate bias to DC source power that bottom coverage is achieved while resputtering of surfaces of the recessed device features is inhibited. The method also comprises depositing a second portion of the metal seed layer at a ration of substrate RF bias to DC source power such that resputtering is not inhibited.

Method of depositing a metal seed layer over recessed feature surfaces in a semiconductor substrate

A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.

Metal / metal nitride barrier layer for semiconductor device applications

A method of applying a sculptured copper seed layer on a semiconductor feature surface using ion deposition sputtering. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material.

Method of depositing a sculptured copper seed layer

Method of depositing a metal seed layer on semiconductor substrates

We have discovered a method of providing a thin, approximately from about 2 &#x212b; to about 100 &#x212b; thick Taseed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the Taseed layer. Further, the Taseed layer exhibits low resistivity, in the range of 30 &#x3bc;&#x3a9;cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface to form the Taseed layer. In another embodiment of the method, a Ta film is altered on its surface to form the Taseed layer.

Method of depositing a tantalum nitride/tantalum diffusion barrier layer system

A method to selectively deposit a barrier layer on dielectric material that surrounds one or more metal interconnects on a substrate is disclosed. The barrier layer is selectively deposited on the metal film using a cyclical deposition process including a predetermined number of deposition cycles followed by a purge step. Each deposition cycle comprises alternately adsorbing a refractory metal-containing precursor and a reducing gas on the dielectric material formed on the substrate in a process chamber.

Selective deposition of a barrier layer on a dielectric material

Method of preventing diffusion of copper through a tantalum-comprising barrier layer

Generally, a method for pre-cleaning native oxides and other contaminants from apertures on a substrate is provided. In one embodiment, a method for pre-cleaning apertures on a substrate includes disposing the substrate on a support member in a process chamber, cooling the substrate at least to a temperature of 100 degrees Celsius, and exposing the substrate to a pre-clean process. In another embodiment, a method for pre-cleaning apertures on a substrate includes cooling the substrate at least to a temperature of 100 degrees Celsius in a first chamber, transferring the substrate to a second chamber and pre-cleaning the substrate in the second chamber while maintaining a substrate temperature of 100 degrees Celsius.

Method and apparatus for cleaning substrates

Damage-free sculptured coating deposition

A method for metallizing integrated circuits is disclosed. In one aspect, an integrated circuit is metallized by depositing liner material on a substrate followed by one or more metal layers. The liner material is selected from the group of tantalum (Ta), tantalum nitride (TaN), niobium (Nb), niobium nitride (NbN), vanadium (V), vanadium nitride (VN), and combinations thereof. The liner material is preferably conformably deposited on the substrate using physical vapor deposition (PVD). The one or more metal layers are deposited on the barrier layer using chemical vapor deposition (CVD), physical vapor deposition (PVD), or a combination of both CVD and PVD.

Liner materials

Growing community of inventors

Fremont, CA, United States of America

Gongda Yao