American Telephone & Telegraph Co., At&t Bell Laboratories

Glen T Cheney

Howard C Kirsch

James H Stefany

James T Nelson

A self-aligned one transistor-capacitor memory cell is provided which uses an n-channel MOS transistor having separate drain and source regions with a first level polysilicon conductor coupled to the top plate of the capacitor and separate second level polysilicon conductors coupled to the gate and drain of the transistor. A reduction in a dimension of the memory cell is acheived compared to a similar memory cell which uses only one level of conductors.

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Allentown, PA, United States of America

Glen T Cheney