Intel Corporation

Gilroy J Vandentop

Daoqiang Lu

Henning Braunisch

Alan M Myers

R Scott List

Rajashree Raji Baskaran

Chuan Hu

Raj Nair

Anna M George, Legal Representative

Valery M Dubin

Yuan-Liang Li

Sarah E Kim

James G Maveety

Ravi V Mahajan

Shriram Ramanathan

Ravi S Prasher

Jun-Fei Zheng

Quat T Vu

Steven N Towle

Chia-Pin Chiu

Gregory Martin Chrysler

Shan X Wang

Rajendran Nair

Sunit Tyagi

Hamid Azimi

Mohsen Alavi

Zhiyong Wang

Peter K Charvat

Phi L Nguyen

John Tang

Payman Aminzadeh

Robert A Gasser

Mark A Fradkin

Ankur Mohan Crawford

Kevin F Carmody

A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.

Microelectronic package having direct contact heat spreader and method of manufacturing same

An inductor structure comprised of a magnetic section and a single turn solenoid. The single turn solenoid to contain within a portion of the magnetic section and circumscribed by the magnetic section.

Integrated inductor structure and method of fabrication

An electro-optic semiconductor package and fabrication method provides enhanced performance. An integrated circuit (IC) having one or more IC contact pads is provided, where the IC contact pads are connected to an IC on the IC wafer. An intermediate wafer having one or more intermediate contact pads is provided, where the intermediate contact pads are connected to an electro-optic arrangement on the intermediate wafer. The method further provides for direct copper bonding the IC contact pads to adjacent intermediate contact pads such that an electro-optic semiconductor package results.

Electrical/optical integration scheme using direct copper bonding

Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

Patterned backside stress engineering for transistor performance optimization

An optical connector comprises a housing having a cavity extending there through to accept a mating connector. The connector comprises no optical components. Dummy solder bonding pads positioned on the connector allow the connector to be automated flip-chip bonded over a substrate waveguide.

Flip-chip mountable optical connector for chip-to-chip optical interconnectability

An integrated circuit to be cooled may be abutted in face-to-face abutment with a cooling integrated circuit. The cooling integrated circuit may include electroosmotic pumps to pump cooling fluid through the cooling integrated circuits via microchannels to thereby cool the heat generating integrated circuit. The electroosmotic pumps may be fluidically coupled to external radiators which extend upwardly away from a package including the integrated circuits. In particular, the external radiators may be mounted on tubes which extend the radiators away from the package.

Using external radiators with electroosmotic pumps for cooling integrated circuits

A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.

Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package

Methods and apparatus to optically couple an optoelectronic chip to a waveguide are disclosed. A disclosed apparatus includes a substrate, a waveguide mounted on the substrate and an optoelectronic chip bonded to the substrate and having an optical element directly engaging the waveguide.

Methods and apparatus to optically couple an optoelectronic chip to a waveguide

A system may include a plurality of pliant conductive elements, a first end of one of the plurality of pliant conductive elements to be electrically coupled to a first electrical contact of an integrated circuit substrate and a second end of the one of the plurality of pliant conductive elements to be electrically coupled to a second electrical contact of an integrated circuit die.

Integrated circuit die/package interconnect

Optical packages are disclosed. In one aspect, an optical package may include a surface, a microelectronic device coupled with the surface, a first waveguide coupled with the microelectronic device, a second waveguide having a first end that is evanescently coupled with the first waveguide and a second end, a first thickness of a cladding material disposed between the second end and the surface, and a second thickness of a cladding material disposed between the first end and the first waveguide. The first thickness may be greater than the second thickness. Methods of making the optical packages are also disclosed. Apparatus and methods of aligning operations on optical packages are also disclosed.

Optical package

Optical apparatus, methods of forming the apparatus, and methods of using the apparatus are disclosed herein. In one aspect, an optical apparatus may include a substrate, an on-substrate microlens coupled with the substrate to receive light from an off-substrate light emitter and focus the light toward a focal point, and an on-substrate optical device coupled with the substrate proximate the focal point to receive the focused light. Communication of light in the reverse direction is also disclosed. Systems including the optical apparatus are also disclosed.

On-substrate microlens to couple an off-substrate light emitter and/or receiver with an on-substrate optical device

Growing community of inventors

Tempe, AZ, United States of America

Gilroy J Vandentop