Synopsys, Inc.

Gerard Luk-Pat

James Patrick Shiely

Hua Song

Fang-Cheng Chang

Benjamin David Painter

Raghava Kondepudy

Alexander Miloslavsky

Yuelin Du

Lantian Wang

Mask design techniques for detection and removal of undesirable artifacts in SADP processes using multiple patterns are disclosed. Artifacts or spurs result from lithographic and chemical processing of semiconducting wafers. The spurs are undesirable because they can cause unwanted connections or act as electrical antennas. Spurs are detected using rule-based techniques and reduced by modifying lithographic masks. The severity of the detected spurs is determined, again using rule-based techniques. The effects of detected spurs can be reduced by modifying the decomposition of the drawn patterns into the two masks used for lithography. Mandrel masks are modified by add dummy mandrel material, and trim masks are modified by removing trim material. The resulting multi-pattern arrangement is used to fabricate the critical design elements that make up the semiconductor wafers.

Detection and removal of self-aligned double patterning artifacts

One embodiment of the present invention provides a system that performs lithography verification for a double-patterning process on a mask layout without performing a full contour simulation of the mask layout. During operation, the system starts by receiving a first mask which is used in a first lithography step of the double-patterning process, and a second mask which is used in a second lithography step of the double-patterning process. Note that the first mask and the second mask are obtained by partitioning the mask layout. Next, the system receives an evaluation point on the mask layout. The system then determines whether the evaluation point is exclusively located on a polygon of the first mask, exclusively located on a polygon of the second mask, or located elsewhere. The system next computes a printing indicator at the evaluation point for the mask layout based on whether the evaluation point is exclusively located on a polygon of the first mask or exclusively located on a polygon of the second mask.

Method and system for performing lithography verification for a double-patterning process

The invention comprises processes for determining and applying a deblurring filter that reduces inspection system distortion, of mask inspection images, by compensating for the non-uniform frequency response of the inspection system. In particular, an adaptive filter is determined empirically for an inspection system: one or more training images are obtained by the inspection system and the filter is determined from such images. In this way, the filter can adapt to the characteristics of each individual inspection system. An example adaptive filter, known as a Weiner filter, is determined and applied.

Method and apparatus for deblurring mask images

To provide fast mask defect scoring, approximated wafer simulations (e.g. using one convolution) are performed on the defect inspection image and its corresponding reference inspection image. Using the approximated defect wafer image and the approximated reference wafer image generated by these approximated wafer simulations, a defect maximum intensity difference (MID) is computed by subtracting one approximated wafer image from the other approximated wafer image to generate a difference image. After a defect region of the difference image is clearly defined, a simulation at the centroid (i.e. a single point) of the defect region is performed. After the defect MID is computed (represented by an intensity) it can be compared to a prototype MID, which can represent a generic nuisance defect.

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Sunnyvale, CA, United States of America

Gerard Luk-Pat