Dft Microsystems, Inc.

Geoffrey D Duerden

Gordon W Roberts

Mohamed M Hafed

Clarence K L Tam

Sébastien Laberge

Bardia Pishdad

Antonio H Chan

A multi-speed jittered signal generator () that generates a full-speed jittered signal () by scaling a low-speed jittered signal () using a frequency scaler (). The low-speed jittered signal is created by injecting a modulation signal () into a reference signal () using a jitter injector (). Injecting jitter into a low-speed reference signal allows the full-speed jittered signal to be of higher quality than conventional jitter signals created by injecting jitter information into a full-speed reference signal. The multi-speed jittered signal generator may be used as part of a testing system () for testing various circuitry, such as high-speed serializer/deserializer circuitry ().

System and method for generating a jittered test signal

A module (') containing an integrated testing system () that includes one or more measurement engines () tightly coupled with a compute engine (). The one or more measurement engines include at least one stimulus instrument () for exciting circuitry of a device-under-test () with one or more stimulus signals, and at least one measurement instrument () that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry () for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine () providing two-way communications between the integrated testing system automated testing equipment () and/or a dedicated user interface () residing on a host computer ().

System and method for testing integrated circuits

Growing community of inventors

Montreal, Canada

Geoffrey D Duerden