Montage Technology Co., Ltd.

Montage Technology (shanghai) Co., Ltd.

Montage Technology Group Limited

Integrated Device Technology, Inc.

Montage Technology Inc.

Gang Shan

Howard Chonghe Yang

Yi Bu Li

Larry Wu

Hui Li

Yibo Jiang

Ye Yang

Stephen Tai

Jingzhong Yang

Yi Li

Chunyi Li

Qingjiang Ma

Frank Hwang

Chonghe Yang

Chunhui Zhang

Zhen-Dong Guo

Dongjie Tang

Guohui Li

Zhendong Guo

Xiaorong Ye

The application discloses a memory controller coupled between a memory module and a host controller to control access of the host controller to the memory module, comprising a central buffer coupled between the host controller and the memory module. The central buffer is configured to receive a command/address signal from the host controller via a command/address channel and selectively provide the command/address signal to the memory module. The command/address signal has an identity authentication message for identifying a source. The central buffer comprises: a verification module coupled to the command/address channel to receive the command/address signal and the identity authentication message, and configured to determine whether the command/address signal conforms to an authority management rule based on the identity authentication message; and an access control module coupled to the command/address channel to receive the command/address signal and coupled to the verification module to receive the determination result, and configured to process the command/address signal based on the determination result to selectively provide the command/address signal to the memory module.

Memory controller and a method for controlling access to a memory module

A computing system includes a host computing device and a slave computing device. The host computing device comprises a host processor, a host device memory and a host address mapping management. The host address mapping management manages a system memory page table, and converts, in response to a data access request from a processing process run on the host processor, requested virtual addresses into host device physical addresses based on the system memory page table to allow the processing process to access corresponding host storage units. The slave computing device includes a slave processor callable by the host processor to assist the host processor in running the processing processes, a slave device memory and a slave address mapping management unit. The slave address mapping unit converts, in response to a data access request of the processing process, requested virtual addresses into slave device physical addresses based on the slave device memory page table, to allow the slave processor to access corresponding slave storage units to assist the host processor in running the processing process.

Computing system and method for sharing device memories of different computing devices

An apparatus controls access to a memory module coupled to a host controller via a data bus to exchange data with the host controller. The apparatus has a configurable information memory and comprises: an access control input port via which the apparatus receives a data access command from the host controller; a control unit to identify a data access command including an access address directed to a predetermined storage region of the memory module, and generate an information processing command based at least on the access address directed to the predetermined storage region, such that the control unit can configure the information memory based on the information processing command or provide the information processing command to the memory module; and an access control output port via which the apparatus provides the information processing command to the memory module, such that the memory module outputs corresponding data information to the host controller based on the information processing command.

Apparatus and method for controlling access to memory module

The present application pertains to a processing device or a distributed processing system using the processing device. The processing device comprises an instruction parsing module configured to receive a data processing instruction indicating a predetermined data processing operation on target data, wherein the data processing instruction comprises a task type field, a data processing operation field, and a data address field; and determine whether the data processing instruction carries the target data according to the task type field; and a data processing module performing the predetermined data processing operation on the target data according to the data processing operation field; wherein, when the data processing instruction carries the target data, the data processing module receives the target data carried by the data processing instruction from the instruction parsing module to perform the predetermined data processing operation on the target data; when the data processing instruction carries the storage address of the target data in the storage module, the processing device accesses the storage module according to the storage address and obtains the target data stored in the storage module.

Processing devices and distributed processing systems

The present application discloses an apparatus for repairing a defect of a memory module, comprises: a central buffer having an address recording module for recording defective address information indicating one or more defective memory addresses in the memory module; the central buffer is configured to receive an access command for accessing a target address in the memory module from a memory interface, and to determine whether to generate a repair access command for repairing the target address according to a comparison result; and a data buffer having a data recording module for recording repair data; wherein the data buffer is coupled between the memory interface and the memory module to buffer data interacted therebetween, and is coupled to the central buffer to receive the access command or the repair access command; the data buffer is configured to write target data associated with the access command into the data recording module as repair data corresponding to a target address according to the repair access command, or read repair data from the data recording module as target data corresponding to a target address.

Apparatus and method for repairing a defect of a memory module, and a memory system

The present application discloses an apparatus for testing defects of a memory module comprises a central buffer for generating a test write command and a test read command to indicate testing to a target address in a memory module; and a data buffer coupled to the central buffer to receive the test write command and the test read command; the data buffer is configured to, in response to the test write command, use target data as repair data corresponding to the target address, and write the target data into the memory module; and, in response to the test read command, to read target data from the target address and compare the target data with the repair data, and to send to the central buffer a comparison result of the target data and the repair data; the central buffer is further configured to record the target address as a tested address when generating the test write command, and determine whether to add the tested address to defective address information based on the comparison result associated with the tested address, defective address information is to indicate one or more defective memory addresses in the memory module.

Apparatus and method for testing a defect of a memory module and a memory system

A memory controller and a method for accessing a memory module are provided. The memory controller is coupled between the memory module and a host controller to control the access of the host controller to the memory module. The memory controller comprises: a central buffer coupled to the host controller for receiving a data access command from the host controller, and coupled to the memory module for providing a modified data access command to the memory module; wherein the central buffer comprises an access command processing module, for processing the data access command to generate the modified data access command; and a data buffer coupled to the central buffer for receiving the modified data access command from the central buffer, and coupled between the host controller and the memory module for exchanging data between the host controller and the memory module under the control of the modified data access command.

Memory controller and method for accessing memory module

A data conversion control apparatus, comprising: at least one first interface each for coupling a first external interface, both of the first interface and the first external interface being in accordance with a predetermined physical interface standard, wherein data transmitted between the first interface and the first external interface is in accordance with a configurable application layer protocol; at least one second interface each for coupling a second external interface, wherein the second external interface is a memory interface in accordance with a predetermined memory interface standard, and the second interface is configurable to match the predetermined memory interface standard; and a data rebuild unit coupled between the at least one first interface and the at least one second interface, wherein the data rebuild unit is configured to rebuild data such that data can be transmitted in respective formats between the at least one first interface and the at least one second interface.

Data conversion control apparatus, memory device and memory system

The application discloses a memory controller and a method for controlling an access to a memory module. The memory controller is coupled between the memory module and a host controller to control the access of the host controller to the memory module. The memory controller comprises: a central buffer coupled to the host controller for receiving data access command from the host controller and coupled to the memory module for providing an encrypted data access command to the memory module; wherein the central buffer comprises a command processing module, for performing encryption operation to a data access command with a predefined command encryption algorithm to generate an encrypted data access command; wherein a data channel is coupled between the memory module and the host controller, and wherein under the control of the encrypted data access command, the memory module exchanges data with the host controller via the data channel.

Memory controller, method for performing access control to memory module

Memory controller and method for accessing memory modules and processing sub-modules

The application discloses a memory controller coupled to a memory module for controlling access to the memory module, wherein the memory module comprises one or more memory groups each having a plurality of memory blocks, and the memory controller comprising: a registering clock driver coupled to the memory module for providing to the memory module a data access command so as to control access to the memory module; one or more data buffers coupled to the registering clock driver, and each data buffer coupled to a memory group via a memory group data interface; wherein at least one of the memory group data interfaces comprises a plurality of data buses each coupled to one or more memory blocks of the memory group that the memory group data interface coupled to, such that the memory group can exchange data with the data buffer via the plurality of data buses under the control of the registering clock driver.

Memory controller enabling dual-mode access to memory module

The present application provides a method for authenticating an application that requests access to a memory, comprising: acquiring an authentication request provided by the application; acquiring a characteristic instruction provided by the application in response to the authentication request; acquiring an instruction pointer corresponding to the characteristic instruction; acquiring from the memory characteristic information of the application which is pre-stored in the memory based on the instruction pointer; and comparing the acquired characteristic information with authentication information corresponding to the application, so as to determine whether the authentication of the application is successful.

Method and device for authenticating application that requests access to memory

A method for controlling an application to access a memory includes: receiving a first access request provided by the application and having a first access key; verifying the first access key; generating a second access key for the application if the verification of the first access key is successful; storing the second access key and providing the second access key to the application; receiving a second access request provided by the application and having a target address and a second access key; identifying whether the target address is within a reference address space indicative of a preset storage location of the memory, and verifying the second access key; generating an access control command according to an identification result of whether the target address is within the reference address space and a verification result of the second access key received from the application so as to restrict or permit the application to access the memory.

Method and apparatus for controlling application to access memory

The application discloses an apparatus for monitoring data access to internal memory device and an internal memory device. The internal memory device is coupled to a memory controller via a memory bus. The monitoring apparatus includes a buffer memory module and a security control module. The buffer memory module is configured to couple with the memory bus to receive and store data exchanged via the memory bus and/or a data access command and a destination address associated with the exchanged data. The security control module is configured to process the exchanged data and/or the data access command and the destination address stored in the buffer memory module to identify the existence of security risk in the data access to the internal memory device. The monitoring apparatus will not affect the operation of the internal memory device, and thus is fully compatible with the conventional system architecture. Moreover, by monitoring the data access to the internal memory device, potential security risks can be identified to improve the security and stability of the system.

Growing community of inventors

Shanghai, China

Gang Shan