Fujitsu Corporation

501 Fujitsu Limited

Vlsi

Fumitake Mieno

Yuji Furumura

Takashi Eshita

Mamoru Maeda

Atsuhiro Tsukune

Tsutomu Nakazawa

Tsunenori Yamauchi

Takuya Watanabe

Takayuki Ohba

Noriaki Sato

Kikuo Itoh

Masaki Kuramae

Kenji Nakagawa

Katsuyoshi Matsuura

Toshiya Suzuki

Nobuhiro Misawa

Hiroshi Miyata

Hirokazu Yamanishi

Masahiko Doki

Masao Yamada

Yoshimi Shioya

Akio Yamaguchi

Masafumi Nakaishi

Masaaki Ichikawa

Tatsushi Hara

Shin-ichi Inoue

Kazuyuki Kurita

Toshihiko Ono

Atuo Shimizu

Kiyokatsu Suzuki

Tatsuya Deguchi

Yasushi Oyama

Akira Tabuchi

Norihisa Tsuzuki

Yasuo Uo-ochi

A method for fabricating a semiconductor device includes the steps of depositing an amorphous silicon layer on a substrate, and forming an oxidation film on a surface of the amorphous silicon layer by treating the surface of the amorphous silicon layer with an oxidation gas. The forming step occurs before crystallization of the amorphous silicon layer.

Method for fabricating a semiconductor device including a step for forming an amorphous silicon layer followed by a crystallization thereof

Method for fabricating a semiconductor device including a step for

An apparatus and method for manufacturing a semiconductor device includes a reaction chamber adapted to exhaust gas therefrom, and a cleaning gas supplying system for introducing cleaning gas containing ClF.sub.3 into the reaction chamber, the system having a plurality of gas blowout holes formed in the flow direction of gas at least in the reaction chamber. The reaction chamber may be a tubular chamber, and the cleaning gas supplying system may be a tube extending from one end to the other end of the reaction chamber along the inner wall or the central axis of the reaction chamber, a plurality of through holes being formed in the side wall of the tube. Damages to the inner surface of the reaction chamber of the semiconductor device manufacturing apparatus can be suppressed and a film attached to the inner wall of the reaction chamber can be removed in a short time.

Semiconductor device manufacturing apparatus and its cleaning method

A structure and its fabrication method of an integrated semiconductor device including circuit elements such as MOSFETs. A well is formed in the semiconductor substrate within windows of a field oxide layer. A lightly-doped semiconductor layer is selectively formed on the exposed surface of the well. A channel region and a pair of source and drain regions of a MOSFET are formed in the lightly-doped semiconductor layer. The highly-doped buried semiconductor layer of the same conductivity type as that of the lightly-doped semiconductor layer is formed under the channel region in the lightly-doped semiconductor layer. The structural features and fabrication method provides a great degree of freedom in designing a MOSFET having a further shorter-channel length without deteriorating its drivability and punch-through breakdown voltage.

An integrated semiconductor device having a buried semiconductor layer

A bipolar transistor includes a base region made of silicon crystal doped with a first impurity to a first level so as to establish a first carrier concentration in the base region and an emitter region made of silicon crystal doped with a second impurity to a second level substantially larger than the first level by a predetermined factor so as to establish a second carrier concentration in the emitter region, in which the second impurity exceeds the solubility limit of the second impurity in silicon crystal. The first and second levels are chosen in such a range that a difference in the carrier concentrations between the emitter region and the base region decreases substantially with increasing impurity level in the base region.

Semiconductor device having a region doped to a level exceeding the

Integrated semiconductor device having a buried semiconductor layer and

A tungsten film is deposited on a substrate by a CVD process using a source gas comprising WF.sub.6, a silane group compound such as SiH.sub.4, Si.sub.2 H.sub.6, Si.sub.3 H.sub.8 or Si.sub.4 H.sub.10, and hydrogen fluoride or fluorine, at a lower temperature than in the prior art. The resultant tungsten film has low sheet resistance and good step coverage. The tungsten film may be selectively deposited.

Method of forming tungsten film

Method of manufacturing a semiconductor device having a region doped to

A chemical vapor deposition (CVD) system for depositing a material selectively on a part of a substrate comprises a reaction chamber in which a CVD process is performed, a substrate holder and substrate heater provided within the reaction chamber, a gas inlet fixture provided on the reaction chamber for introducing one or more CVD source gases into the reaction chamber, and a reactant distribution fixture provided on the gas inlet fixture within the reaction chamber for controlling distribution of the reactant species in the reaction chamber, wherein the reactant distribution fixture defines a subspace surrounding the substrate within the space of the reaction chamber such that the subspace has a dimension, measured in a direction generally perpendicular to the surface of the substrate such that the dimension is at least less than one half of the mean free path of the reactant species realized inside the space of the reaction chamber during the CVD process and such that an opening is formed for communicating the subspace inside the reaction distribution means with the rest of the space of the reaction chamber for freely passing product species formed as a result of the chemical reaction at the surface of the substrate.

Chemical vapor deposition system

A heating apparatus for use in heating a substrate comprises an electric heater and a power supply part. The electric heater is made up of an approximately columnar body which is made of graphite, and this columnar body has a top with a flat surface part on which the substrate is placed and a pair of legs which extend downwardly from the flat surface part. The legs are defined by an opening in the columnar body. The power supplying part is coupled to the electric heater and supplies a voltage across the legs of the columnar body so that a current flows from one leg to the other, thereby generating heat at the flat surface part to heat the substrate.

Graphite columnar heating body for semiconductor wafer heating

A silicon carbide layer between a silicon substrate or layer and a metal layer because silicon carbide has many properties similar to those of silicon, has a very slow diffusion rate of a metal through the silicon carbide, or prevents a diffusion of a metal into the silicon, and can be deposited by CVD, which has an advantage of a good coverage over a step portion such as a contact window.

Silicon carbide barrier between silicon substrate and metal layer

A method of fabricating an X-ray exposure mask including the steps of forming a .beta.-SiC membrane by chemcial vapor deposition and simultaneously doping the membrane with at least one of phosphorous, boron, nitrogen and oxygen.

Method of fabricating an X-ray exposure mask

A method for simultaneously forming an epitaxial silicon layer on a surface of a silicon substrate, and a polysilicon layer on a silicon dioxide (SiO.sub.2) layer which is formed on the silicon substrate using a low pressure silicon vapor deposition method, employing silicon hydride gas, particularly disilane (Si.sub.2 O.sub.6), as a silicon source gas. A crystal growing temperature ranging from 780.degree. C. to 950.degree. C. and a reaction gas pressure ranging from 20 Torr to 300 Torr are desirable. An extended silicon epitaxial region is achieved under a higher temperature and a higher gas pressure, and with a substrate of a (100) orientation. A polysilicon layer having an even surface and joining smoothly to an epitaxial silicon layer which is simultaneously formed, is obtained under a lower temperature and a lower gas pressure, and with a substrate of a (111) orientation.

Vapor deposition method for simultaneously growing an epitaxial silicon

The present invention is a method for fabricating bipolar-MOS devices having n-MOSs, p-MOSs and bipolar transistors, each fabricated in a respective silicon single crystal layer grown in openings formed in a field oxide layer covering a silicon substrate. Over the field oxide layer, having openings where the active devices should be fabricated, is applied an epitaxial growth of silicon. By this operation, single crystal layers are formed in the openings, and a polysilicon layer is formed on the field oxide layer. The polysilicon layer is patterned to form the source and drain contact electrodes of the FETs and the base and collector contact electrodes of the bipolar transistors simultaneously. To the active areas, contact electrodes for the p-MOS, and base contact electrodes of the npn bipolar transistors are simultaneously implanted with p type impurities by ion implantation. The active areas, contact electrodes for the n-MOS, and the collector contact electrodes of the npn bipolar transistors are simultaneously implanted with n type impurities by ion implantation. For the pnp transistors, an inverse process of the above is applied. By such a method, the process for fabricating the bipolar-MOS device is simplified, and the operation of the device is improved.

Method for fabricating bipolar-MOS devices

Growing community of inventors

Kawasaki, Japan

Fumitake Mieno