Shin-etsu Handotai Co., Ltd.

Fumitaka Kume

Ryoji Hoshi

Ken Aihara

Masayuki Shinohara

Fumio Tahara

Tomosuke Yoshida

Satoshi Tobe

Naohisa Toda

Hisatoshi Kashino

A method for manufacturing a resistivity standard sample include the steps, preparing a first-conductivity-type silicon single crystal substrate, measuring a thickness of the silicon single crystal substrate by using a thickness measuring instrument having traceability to the national standard, growing a second-conductivity-type silicon epitaxial layer on the silicon single crystal substrate to fabricate an epitaxial wafer having a p-n junction, measuring a thickness of the epitaxial wafer by using the thickness measuring instrument having the traceability to the national standard, obtaining a thickness of the silicon epitaxial layer from the thicknesses of the epitaxial wafer and the silicon single crystal substrate, and measuring a resistivity of the silicon epitaxial layer by using a resistivity measuring instrument having traceability to a resistivity standard reference material. Consequently, the method for manufacturing which enables manufacturing a resistivity standard sample having the traceability to the resistivity standard reference material of, e.g., NIST is provided.

Method for manufacturing resistivity standard sample and method for measuring resistivity of epitaxial wafer

Proposed are a C-V characteristic measurement system and a method of measuring C-V characteristics that allow for less change in resistivity with time in repeated measurement of a single crystal silicon wafer using a mercury electrode, as compared to those in the related arts. Measurement is conducted with use of a C-V characteristic measurement system including: a mercury probefor putting mercury as an electrode to contact with a single crystal silicon wafer; an LCR meterfor forming a depletion layer by supplying a high-frequency wave to the single crystal silicon wafer via the mercury probeto apply a reverse bias voltage to the single crystal silicon wafer while measuring a capacitance of the depletion layer; analysis software for calculating C-V characteristics based on the reverse bias voltage and the capacitance of the depletion layer; and a static electricity removing devicefor removing static electricity of the single crystal silicon wafer.

C-V characteristic measurement system and method for measuring C-V characteristics

An ozone gas generation processing apparatus that includes a light source of ultraviolet rays and a wafer placement section, generates ozone gas by irradiating ultraviolet rays from the light source in an atmosphere containing oxygen, and processes a wafer on the wafer placement section with the ozone gas, the ozone gas generation processing apparatus comprising a light-blocking plate that allows the generated ozone gas to pass therethrough and blocks the ultraviolet rays between the light source and the wafer placed on the wafer placement section. An ozone gas generation processing apparatus and a method of forming an oxide film silicon film can make an adjustment to make thinner an oxide film formed on a wafer surface, the wafer surface is not damaged by ultraviolet rays when processed, and a method for evaluating a silicon single crystal wafer, obtaining a more stable measurement value of C-V characteristics are provided.

Ozone gas generation processing apparatus, method of forming silicon oxide film, and method for evaluating silicon single crystal wafer

A Metal Organic Vapor Phase Epitaxy step of growing a light emitting layer sectioncomposed of a first Group III-V compound semiconductor, epitaxially on a single crystal growth substrateby Metal Organic Vapor Phase Epitaxy, and a Hydride Vapor Phase Epitaxial Growth step of growing a current spreading layeron the light emitting layer sectionepitaxially by Hydride Vapor Phase Epitaxial Growth Method, are conducted in this order. Then, the current spreading layeris grown, having a low-rate growth layerpositioned close to the light emitting layer side and then a high-rate growth layerhaving a growth rate of the low-rate growth layerlower than that of the high-rate growth layerso as to provide a method of fabricating a light emitting device capable of preventing hillock occurrence while forming the thick current spreading layer.

Method of fabricating light emitting device and compound semiconductor wafer and light emitting device

There is provided a preferential etching method wherein a preferential etchant which contains at least a hydrofluoric acid whose composition by volume falls within the range of 0.02 to 0.1, a nitric acid whose composition by volume falls within the range of 0.5 to 0.6, an acetic acid whose composition by volume falls within the range of 0.2 to 0.25, and water is used to etch a silicon single crystal substrate whose electrical resistivity is less than 10 m&#x3a9;&#xb7;cm at a rate higher than 0.1 &#x3bc;m/min, thereby eliciting BMDs on a surface of the silicon single crystal substrate. As a result, the preferential etching method that can evaluate and utilize characteristics of crystal defects, especially BMDs in an ultralow-resistance silicon single crystal substrate whose electrical resistivity is less than 10 m&#x3a9;&#xb7;cm, which cannot be readily detected by conventional techniques, by performing preferential etching using a chromeless etchant containing no harmful chrome can be provided.

Preferential etching method and silicon single crystal substrate

A silicon epitaxial layeris grown in vapor phase on a silicon single crystal substratemanufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 &#x3a9;&#xb7;cm or below, oxygen precipitation nucleiare formed in the silicon single crystal substrate, by carrying out annealing at 450&#xb0; C. to 750&#xb0; C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layeras a result of the annealing, and thus-formed silicon oxide filmis etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.

Growing community of inventors

Annaka, Japan

Fumitaka Kume