Hitachi, Ltd.

Showa Denko K.k.

Renesas Technology Corp.

Hitachi Chemical Company, Ltd.

Other

Fumio Murai

Norio Hasegawa

Katsuya Hayano

Shinji Okazaki

Haruo Yoda

Hiroshi Fukuda

Hiroshi Shiraishi

Yoshihiro Saida

Yoshiaki Ikenoue

Hideki Tomozawa

Yukinobu Shibata

Yasunori Suzuki

Ryuma Takashi

Susumu Takahashi

Yutaka Kaneko

Katsuhiro Kuroda

Yoshihiko Okamoto

Shigeki Hirasawa

Norio Saitou

Takashi Yunogami

Masakazu Sugaya

Kozo Mochiji

Takao Kumihashi

Kazuyuki Suko

Akemi Moniwa

Masafumi Kanetomo

Tomoji Watanabe

Jiro Yamamoto

Shunji Sasabe

Toshio Sakamizu

Tatuharu Yamamoto

Akira Hirakawa

Ikuo Takada

Jun Abe

Mutsuko Hatano

Hiroshi Okamoto

Yoshinori Nakayama

Tokuo Kure

Tsuneo Terasawa

Tomonori Tanoue

Ushio Kawabe

Toshikazu Nishino

Takumi Ueno

Akira Ishikawa

Nobuaki Hayashi

Tetsuichi Kudo

Takashi Soga

Masayoshi Saito

Katsuki Miyauchi

Haruhiro Hasegawa

Asao Isobe

Takao Iwayanagi

Katsuhiko Mitani

Chushirou Kusano

Hiroaki Wakabayashi

Hidenori Yamaguchi

Hiroshi Miyazaki

Hajime Hayakawa

Tosiyuki Yamamoto

Akira Tsukizoe

Yozi Maruyama

A semitransparent phase shifting mask has, in the periphery of a pattern element area, a light shielding portion which is formed by a semitransparent phase shifting portion and a transparent portion with the optimal size combination. A pattern is formed employing the semitransparent phase shifting mask.

Photomask and pattern forming method employing the same

A method is provided for solving a problem that the fine processing property is degraded by an increase of a current applied to complementarily divided masks in an electron beam projection process. In the method, the complementarily divided masks used for electron projection are used whereby one mask is used for patterns requiring high dimensional accuracy and another is used for other patterns. Consequently, it is possible to lower the current applied to the patterns requiring high dimensional accuracy to realize high printing accuracy. In addition, the highly accurate patterns can be formed at a high throughput.

Semiconductor device and manufacturing method thereof

Patterns for exposure are divided into subdivided regions taking into consideration a scope of an effect of backscattering, the Coulomb effect, and process factors, respectively, on errors in dimensions, and a pattern area occupancy ratio (pattern area density) within the respective subdivided regions is retained, thereby executing exposure with patterns after finding dimensions of pattern modification as the function of the respective pattern area densities. As a result, it becomes possible to fabricate a mask provided with correction for the errors in the dimensions, caused by plural factors such as backscattering, the Coulomb effect, and process factors, and to obtain highly accurate patterns for exposure. Further, use of pattern area density maps enables data processing time necessary for correction to be considerably reduced.

Method for fabrication of patterns and semiconductor devices

There is disclosed a method for forming micro patterns in a semiconductor integrated circuit device with high productivity and high accuracy. A photolithography having high throughput and electron beam lithography using a reticle and having relatively high throughput and high resolution are selectively used so as to obtain highest throughput while satisfying accuracy and resolution required for each product/layer. In the case of using the electron beam lithography, a non-complementary reticle and a complementary reticle are selectively used so as to obtain highest throughput while satisfying required accuracy and resolution. Thus, productivity and integration can be improved for the semiconductor integrated circuit device.

Semiconductor device and a manufacturing method of the same

To provide a method of manufacturing a semiconductor device for manufacturing a minute pattern with high accuracy using a stencil mask. An input layout data is classified into rectangles according to pattern width or the like, a boundary is created that divides a periphery or an inside of each classified graphics, an input pattern is fractionized by the boundary, and a complementary mask with fractionized patterns on both sides of the boundary distributed into different layers is used to form a pattern.

Method of manufacturing semiconductor device

So as to provide a substrate temperature control system capable of unifying the temperature of the substrate and capable of shortening the temperature elevation time (temperature lowering time), the substrate temperature control system is equipped with a temperature control plate (heating or cooling plate) having a plurality of projections on the surface and serving to set the temperature of the substrate, and a chuck mechanism to fix the substrate in contact to a plurality of the projections by chucking the substrate toward the direction of the temperature control plate.

Substrate temperature control system and method for controlling temperature of substrate

In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask having a rounded outer periphery at its head is used when the Pt film deposited on a semiconductor substrate is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film which is left on the side of the pattern. The resist mask is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

Process for manufacturing semiconductor integrated circuit device

To provide a substrate temperature control system capable of unifying the temperature of the substrate and capable of shortening the temperature elevation time (temperature lowering time), the substrate temperature control system is equipped with a temperature control plate (heating or cooling plate) having a plurality of projections on its surface and acting to set the temperature of the substrate. A chuck mechanism is provided to fix the substrate in contact with a plurality of the projections by chucking the substrate toward the temperature control plate.

In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

Growing community of inventors

Tokyo, Japan

Fumio Murai