Infineon Technologies Ag

Friedrich Wanninger

Jens G Pohl

Christian Hauser

Simon Muff

Uta Gebauer

Thomas M&uuml;nch

A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

Encasing arrangement for a semiconductor component

The invention relates to an electronic device having a multiplicity of contact bumps and an intermediate support. In this case, the intermediate support connects the multiplicity of contact bumps to contact areas of a semiconductor chip via a multiplicity of flat conductors which have contact connecting lugs exposed in a bonding channel window of the intermediate support. The contact areas are configured in the bonding channel window via the bonded contact connecting lugs of the flat conductors. The width of the bonding channel window is increasingly greater with increasing distance from the neutral point of the semiconductor chip.

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Munich, Germany

Friedrich Wanninger