Tokyo Electron Limited

Tel Epion Corporation

Novellus Systems Incorporated

Frank M Cerio, Jr

Tadahiro Ishizaka

Shigeru Mizuno

Jacques Faguet

Tsukasa Matsuda

Bruce David Gittleman

John Stephen Drewery

Jozef Brcka

Mirko Vukovic

Noel Russell

Kaoru Yamamoto

Glyn J Reynolds

Derrek Andrew Russell

Michael James Grapperhaus

Gregory Herdt

Jonathan David Reid

Kenji Suzuki

Thomas Anand Ponnuswamy

Yasushi Mizusawa

Rodney Lee Robison

Hiroyuki Nagai

Satohiko Hoshino

Yuki Chiba

Miho Jomen

Kazuhito Tohnoe

Adam Selsley

Adam Selsey

A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor.

Selective deposition of metal-containing cap layers for semiconductor devices

According to one embodiment, the method includes providing a substrate containing a metal-containing barrier layer having an oxidized surface layer, exposing the oxidized surface layer to a flow of a first process gas containing plasma-excited argon gas to activate the oxidized surface layer and applying substrate bias power during the exposing of the oxidized surface layer to the flow of the first process gas. The method further includes exposing the activated oxidized surface layer to a second process gas containing non-plasma-excited hydrogen gas, wherein the exposure to the first process gas, in addition to activating the oxidized surface layer, facilitates chemical reduction of the activated oxidized surface layer by the second process gas containing the hydrogen gas. A thickness of the metal-containing barrier layer is not substantially changed by the hybrid in-situ dry cleaning process.

Hybrid in-situ dry cleaning of oxidized surface layers

A method is provided for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a planarized patterned substrate containing metal surfaces and dielectric layer surfaces with a residue formed thereon, removing the residue from the planarized patterned substrate, and depositing metal-containing cap layers selectively on the metal surfaces by exposing the dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor. The removing includes treating the planarized patterned substrate containing the residue with a reactant gas containing a hydrophobic functional group, and exposing the treated planarized patterned substrate to a reducing gas.

Surface cleaning and selective deposition of metal-containing cap layers for semiconductor devices

A plasma enhanced atomic layer deposition (PEALD) method and system, the system including a process chamber and a substrate holder provided within the processing chamber and configured to support a substrate on which a predetermined film will be formed. A first process material supply system is configured to supply a first process material to the process chamber, and a second process material supply system configured to supply a second process material to the process chamber in order to provide a reduction reaction with the first process material to form the predetermined film on the substrate. Also included is a power source configured to couple electromagnetic power to the process chamber to generate a plasma within the process chamber to facilitate the reduction reaction, and a chamber component exposed to the plasma and made from a film compatible material that is compatible with the predetermined film deposited on the substrate.

Plasma enhanced atomic layer deposition system and method

Methods are provided for multi-step Cu metal plating on a continuous Ru metal film in recessed features found in advanced integrated circuits. The use of a continuous Ru metal film prevents formation of undesirable micro-voids during Cu metal filling of high-aspect-ratio recessed features, such as trenches and vias, and enables formation of large Cu metal grains that include a continuous Cu metal layer plated onto the continuous Ru metal film. The large Cu grains lower the electrical resistivity of the Cu filled recessed features and increase the reliability of the integrated circuit.

Methods for multi-step copper plating on a continuous ruthenium film in recessed features

An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a process which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang within a vacuum chamber. The iPVD system is operated at low target power and high pressure &#x3e;50 mT to sputter material from the target. RF energy is coupled into the chamber to form a high density plasma. A small RF bias (less than a few volts) can be applied to aid in enhancing the coverage, especially at the bottom.

Ionized physical vapor deposition (iPVD) process

Methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices containing metal cap layers. According to one embodiment, a method of forming a semiconductor device includes planarizing a top surface of a workpiece to form a substantially planar surface with conductive paths and dielectric regions, forming metal cap layers on the conductive paths, and exposing the top surface of the workpiece to a dopant source from a gas cluster ion beam (GCIB) to form doped metal cap layers on the conductive paths and doped dielectric layers on the dielectric regions. According to some embodiments, the metal cap layers and the doped metal cap layers contain a noble metal selected from Pt, Au, Ru, Rh, Ir, and Pd.

Method of forming semiconductor devices containing metal cap layers

A method for integrating ruthenium (Ru) metal cap layers and modified Ru metal cap layers into copper (Cu) metallization of semiconductor devices to improve electromigration (EM) and stress migration (SM) in bulk Cu metal. In one embodiment, the method includes providing a planarized patterned substrate containing a Cu metal surface and a dielectric layer surface, depositing first Ru metal on the Cu metal surface, and depositing additional Ru metal on the dielectric layer surface, where the amount of the additional Ru metal is less than the amount of the first Ru metal. The method further includes at least substantially removing the additional Ru metal from the dielectric layer surface to improve the selective formation of a Ru metal cap layer on the Cu metal surface. Other embodiments further include incorporating one or more types of modifier elements into the dielectric layer surface, the Cu metal surface, the Ru metal cap layer, or a combination thereof.

Method for forming a ruthenium metal cap layer

Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices containing metal cap layers are generally described herein. According to one embodiment, a method of forming a semiconductor device includes planarizing a top surface of a workpiece to form a substantially planar surface with conductive paths and dielectric regions, forming metal cap layers on the conductive paths, and exposing the top surface of the workpiece to a dopant source from a gas cluster ion beam (GCIB) to form doped metal cap layers on the conductive paths and doped dielectric layers on the dielectric regions. According to some embodiments the metal cap layers and the doped metal cap layers contain a noble metal selected from Pt, Au, Ru, Rh, Ir, and Pd.

A method light enhanced atomic layer deposition for forming a film on a substrate. The method includes disposing the substrate in a process chamber of a light enhanced atomic layer deposition (LEALD) system configured to perform a LEALD process; and depositing a film on the substrate using the LEALD process, where the depositing includes (a) exposing the substrate to a first process material, (b) exposing the substrate to a second process material containing a reducing agent and irradiating the substrate with a first light radiation having either no or at least partial temporal overlap with the exposing of the substrate to the second process material, (c) repeating steps (a) and (b) until the desired film has been deposited. According to one embodiment of the invention, the deposited film can be a TaCN film or a TaC film.

Method of light enhanced atomic layer deposition

An iPVD system uses a high density inductively coupled plasma (ICP) at high pressure of at least 50 mTorr to deposit uniform ultra-thin layer of a tantalum nitride material barrier material onto the sidewalls of high aspect ratio nano-size features on semiconductor substrates, preferably less than 2 nm thick with less than 4 nm in the field areas. The process includes depositing an ultra-thin TaN barrier layer having a high nitrogen concentration that produces high resistivity, preferably at least 1000 micro-ohm-cm. The ultra-thin TaN film is deposited by a low deposition rate process of less than 20 nm/minute, preferably 2-10 nm/min, to produce the high N/Ta ratio layer without nitriding the tantalum target. The layer provides a barrier to copper (Cu) diffusion and a high etch resistant etch-stop layer for subsequent deposition-etch processes.

Barrier deposition using ionized physical vapor deposition (iPVD)

An iPVD system is programmed to deposit uniform material, such as a metallic material, into high aspect ratio nano-sized features on semiconductor substrates using a process that enhances the feature filling compared to the field deposition, while maximizing the size of the grain features in the deposited material opening at the top of the feature during the process. Sequential deposition and etching are provided by controlling DC and high density power levels and other parameters.

Method and apparatus for a metallic dry-filling process

A plasma enhanced atomic layer deposition (PEALD) system includes a first chamber component coupled to a second chamber component to provide a processing chamber defining an isolated processing space within the processing chamber. A substrate holder is provided within the processing chamber and configured to support a substrate, a first process material supply system is configured to supply a first process material to the processing chamber and a second process material supply system is configured to supply a second process material to the processing chamber. A power source is configured to couple electromagnetic power to the processing chamber, and a sealing assembly interposed between the first and second chamber components. The sealing assembly includes a plurality of sealing members configured to reduce the amount of external contaminants permeating through an interface of the first and second components into the isolated processing space of the processing chamber, wherein the film is formed on the substrate by alternatingly introducing the first process material and the second process material.

Plasma enhanced atomic layer deposition system

An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a multi-step process within a vacuum chamber which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang.

Growing community of inventors

Schenectady, NY, United States of America

Frank M Cerio, Jr