Average Co-Inventor Count = 3.16
ph-index = 10
The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.
Company Filing History:
1. International Business Machines Corporation (23 from 164,219 patents)
2. Qualcomm Incorporated (21 from 41,572 patents)
44 patents:
1. 11270761 - Dual-mode high-bandwidth SRAM with self-timed clock circuit
2. 11031075 - High bandwidth register file circuit with high port counts for reduced bitline delay
3. 10978139 - Dual-mode high-bandwidth SRAM with self-timed clock circuit
4. 10658029 - High bandwidth double-pumped memory
5. 10622043 - Multi-pump memory system access circuits for sequentially executing parallel memory operations
6. 10424392 - Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods
7. 10394471 - Adaptive power regulation methods and systems
8. 10224084 - Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods
9. 10163490 - P-type field-effect transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells, and related memory systems and methods
10. 10115481 - Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods
11. 10026456 - Bitline positive boost write-assist circuits for memory bit cells employing a P-type Field-Effect transistor (PFET) write port(s), and related systems and methods
12. 9984730 - Negative supply rail positive boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods
13. 9947406 - Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methods
14. 9940992 - Leakage-aware activation control of a delayed keeper circuit for a dynamic read operation in a memory bit cell
15. 9842634 - Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods