International Business Machines Corporation

Other

Siemens Aktiengesellschaft

Applied Materials, Inc.

Fen Fen Jamin

Laertis Economikos

Michael F Lofaro

Kenneth M Davis

Klaus D Beyer

Patrick Ronald Varekamp

Timothy Joseph Dalton

Katherine Lynn Saenger

Sandra Guy Malhotra

Andrew Herbert Simon

Chandrasekhar Narayan

David Lee Rath

Shyng-Tsong Chen

Mahadevaiyer Krishnan

Kaushik Arun Kumar

Chao-Kun Hu

Wei-Tsu Tseng

Judith Marie Rubino

Steffen K Kaldor

Bradley Paul Jones

Sumit Pandey

Sean P E Smith

Donald J Delehanty

Daniel M Heenan

Bruce Bennett Doris

David V Horak

Ravikumar Ramachandran

Omer H Dokumaci

David Edward Kotecki

Huajie Chen

Kathryn Turner Schonenberg

Gregory Gower Freeman

Kenneth Jay Stein

Seshadri Subbanna

Francis R Krug, Jr

Gopalakrishna B Prabhu

Gerhard Kunkel

Basanth Jagannathan

Hua Shen

David C Ahlgren

Jenny Lian

Satish D Athavale

Nirmal Chaudhary

David Angell

Joseph F Salfelder

James Hannah

Ralph R Comulada

Wayne R Swart

Chienting Lin

Juin-Fang Wang

Srinivas R Mirmira

Joseph M Danza

Disclosed herein are a system and method of polishing a layer of a substrate. The disclosed method includes providing a polishing apparatus adapted to impart relative movement between a polishing pad and a substrate having a first layer to be polished; providing a liquid medium having a pH between 4 and 11 to an interface between the substrate and the polishing pad, the liquid medium including a pH controlling substance including at least one of an acid and a base, a carbonate and a stabilizer additive comprising at least one selected from the group consisting of amino acids and polyacrylic acid; and moving at least one of the substrate and the polishing pad relative to the other to polish the layer of the substrate.

Planarization system and method using a carbonate containing fluid

An integrated circuit structure is disclosed that has a layer of logical and functional devices and an interconnection layer above the layer of logical and functional devices. The interconnection layer has a substrate, conductive features within the substrate and caps positioned only above the conductive features.

Copper recess process with application to selective capping and electroless plating

A method and polishing system for planarizing a substrate having one or more materials formed thereon. The method generally includes positioning the substrate in proximity with a polishing pad, dispensing a polishing fluid to the polishing pad, the polishing fluid being subjected to carbonation prior to being dispensed to the polishing pad, and polishing the substrate. The polishing system generally includes a polishing platen having a polishing pad disposed thereon and in proximity to the substrate, a controller configured to cause the polishing pad to contact the substrate, and a polishing fluid delivery system to deliver a polishing fluid to the polishing pad, the polishing fluid delivery system including a carbonation system.

Carbonation of pH controlled KOH solution for improved polishing of oxide films on semiconductor wafers

A method of planarization allows for the use of chemical mechanical polishing (CMP) in starting structures having films not generally suitable for CMP processes. Two material layers are formed over a starting structure, and the upper layer is planarized in a CMP process. A nonselective etch is then used to transfer the planar topography to the lower level.

Methods of planarization

A method of forming a BiCMOS integrated circuit having a raised extrinsic base is provided. The method includes first forming a polysilicon layer atop a surface of a gate dielectric which is located atop a substrate having device areas for forming at least one bipolar transistor and device areas for forming at least one complementary metal oxide semiconductor (CMOS) transistor. The polysilicon layer is then patterned to provide a sacrificial polysilicon layer over the device areas for forming the at least one bipolar transistor and its surrounding areas, while simultaneously providing at least one gate conductor in the device areas for forming at least one CMOS transistor. At least one pair of spacers are then formed about each of the at least one gate conductor and then a portion of the sacrificial polysilicon layer over the bipolar device areas are selectively removed to provide at least one opening in the bipolar device area. At least one bipolar transistor having a raised extrinsic base is then formed in the at least one opening.

BiCMOS integration scheme with raised extrinsic base

An oxynitride material is used to form shallow trench isolation regions in an integrated circuit structure. The oxynitride may be used for both the trench liner and trench fill material. The oxynitride liner is formed by nitriding an initially formed oxide trench liner. The oxynitride trench fill material is formed by directly depositing a high density plasma (HDP) oxide mixture of SiH and O and adding a controlled amount of NH to the plasma mixture. The resultant oxynitride structure is much more resistant to trench fill erosion by wet etch, for example, yet results in minimal stress to the surrounding silicon. To further reduce stress, the nitrogen concentration may be varied by varying the proportion of O to NH in the plasma mixture so that the nitrogen concentration is maximum at the top of the fill material.

Method of formation of an oxynitride shallow trench isolation

Oxynitride shallow trench isolation and method of formation

The polishing uniformity of a material on a substrate is improved by using a polishing method where an applied pressure on the backside of the substrate is changed during the polishing process. The method is especially useful for polishing thin material layers requiring precise control of polishing across the substrate, e.g., for TaSiN layers used in the formation of gate stacks and stacked capacitors.

Chemical-mechanical polishing methods

A method for forming an electrode. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. The electrode is formed photolithographically, misalignment of a mask registration in the photolithography resulting in exposing surface portions of the barrier contact. A second dielectric layer is deposited over the first dielectric layer, over side portions and top portions of the formed electrode, and over the exposed portions of barrier contact. A sacrificial material is provided on portions of the second dielectric layer disposed on lower sides of the, electrode, on portions of the second dielectric layer disposed on the first dielectric layer, and on said exposed portions of the barrier contact while exposing portions of the second dielectric layer on the top portions and upper side portions of the formed electrode. The exposed portions of the second dielectric layer are removed while leaving the portions of the second dielectric layer on the exposed portions of the barrier contact. A material is deposited over exposed portions of the first electrode and over remaining portions of the second dielectric layer in an oxidizing environment. A second electrode is formed for the storage element over the material. In forming a capacitor storage element, the portion of the second dielectric layer on the barrier contact prevents oxidation of the barrier contact during the material formation process.

Semiconductor structure and manufacturing method

A system for chemical-mechanical polishing is described which includes a wafer backing film having concentric first and second portions. The portions of the wafer backing film are of different materials. The second portion of the wafer backing film has an annular shape and surrounds the first portion; a backing shim is used to adjust the first portion and second portion with respect to each other in a vertical direction. The first and second portions of the wafer backing film and the backing shim are mounted on an adhesive assembly film, thereby forming an assembly for mounting on a wafer carrier. The second portion of the wafer backing film is less compressible than the first portion, and is adjusted in the vertical direction so that the outer edge of the wafer is substantially sealed when backside air is applied to the wafer during a film removal process.

Chemical-mechanical polishing system having a bi-material wafer backing film assembly

A system is provided for chemical mechanical polishing (CMP) of a semiconductor wafer by periodically relatively moving a polishing pad on a rotating platen, and the wafer, retained in the aperture of a rotating and oscillating ring having a wear surface surrounding the aperture and wafer, with respect to each other while the wafer and wear surface frictionally contact the pad. A CMP slurry is dispensed to the wafer periphery in the vicinity of the pad at a plurality of perimetrically spaced apart channels in the wear surface maintained in fixed relation to the wafer during the relative movement. The ring is fixed to the underside of a carrier in turn fixed at its upper portion to the bottom end of a spindle which is rotatably mounted at its top end on an oscillating support beam, such that the wafer, ring, carrier and spindle rotate and oscillate in common. The carrier has a heat exchanger to heat or cool the slurry. Passages in the spindle flow connected with conduits in the carrier correspondingly supply the slurry to the ring channels, temperature adjusting fluid to and from the heat exchanger, and pressure fluid, e.g., air, to the inner side of the wafer in the ring aperture, respectively, during common rotation and oscillation of the wafer, ring, carrier and spindle.

System for dispensing polishing liquid during chemical mechanical polishing of a semiconductor wafer

A system for chemical-mechanical polishing is described which includes a wafer backing film having concentric first and second portions, and a wafer carrier having corresponding first and second portions for mounting the portions of the wafer backing film thereon. The portions of the wafer backing film are of different materials. The second portion of the wafer backing film has an annular shape and surrounds the first portion; the second portion of the wafer carrier is adjustable with respect to the first portion of the wafer carrier in a vertical direction. The second portion of the wafer backing film is less compressible than the first portion, and is adjusted in the vertical direction so that the outer edge of the wafer is substantially sealed when backside air is applied to the wafer during a film removal process.

Chemical-mechanical polishing system having a bi-material wafer backing film and two-piece wafer carrier

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Wappingers Falls, NY, United States of America

Fen Fen Jamin