The University of Texas System

Fei Yang

Bilal Akin

Shi Pu

Chi Xu

Bhanu Teja Vankayalapati

Enes Ugur

Masoud Farhadi

A system to detect gate-open failures in a MOS based insulated gate transistor can include a detection circuit, including a first circuit configured to measure a drain-source voltage across the MOS based insulated gate transistor, a first comparator circuit can be configured to compare the measured drain-source voltage to a threshold drain-source conduction voltage indicating a conduction state of a channel of the MOS based insulated gate transistor, a second circuit can be configured to measure a gate voltage applied at a gate of the MOS-based insulated gate transistor, a second comparator circuit can be configured to compare the gate voltage applied at the gate to a threshold gate voltage for the MOS based insulated gate transistor to provide an indication of whether the gate voltage applied at the gate is sufficient to activate conduction in the channel and a logic circuit can be configured to detect a gate-open failure of the MOS based insulated gate transistor based on the conduction state of the channel and the indication of whether the gate voltage applied at the gate is sufficient to activate conduction in the channel when the MOS based insulated gate transistor is in an on state or an off state.

Systems, circuits, and methods to detect gate-open failures in MOS based insulated gate transistors

A method of measuring a junction temperature of a SiC MOSFET can be provided by applying a gate-source voltage to an external gate loop coupled to a gate of the SiC MOSFET, detecting a first time when the gate-source voltage exceeds a first value configured to disable conduction of a current in a drain of the SiC MOSFET, detecting, after the first time, a second time when a voltage across a common source inductance in a package of the SiC MOSFET indicates that the current in the drain is greater than a reference value, defining a time interval from the first time to the second time as a turn on delay time of the SiC MOSFET and determining the junction temperature for the SiC MOSFET using the turn on delay time.

Methods of measuring real-time junction temperature in silicon carbide power MOSFET devices using turn-on delay, related circuits, and computer program products

Embodiments according to the invention can provide methods of testing a SiC MOSFET, that can include applying first and second voltage levels across a gate-source junction of a SiC MOSFET and measuring first and second voltage drops across a reverse body diode included in the SiC MOSFET responsive to the first and second voltage levels, respectively, to provide an indication of a degradation of a gate oxide of the SiC MOSFET and an indication of contact resistance of the SiC MOSFET, respectively.

Methods of determining operating conditions of silicon carbide power MOSFET devices associated with aging, related circuits and computer program products

A method of monitoring a condition of a SiC MOSFET can include (a) applying a first test gate-source voltage across a gate-source of a SiC MOSFET in-situ, the first test gate-source voltage configured to operate the SiC MOSFET in saturation mode to generate a first drain current in the SiC MOSFET, (b) applying a second test gate-source voltage across the gate-source of the SiC MOSFET in-situ, the second test gate-source voltage configured to operate the SiC MOSFET in fully-on mode to generate a second drain current in the SiC MOSFET, (c) determining a drain-source saturation resistance using the first drain current to provide an indication of a degradation of a gate oxide of the SiC MOSFET; and (d) determining a drain-source on resistance using the second drain current to provide an indication of a degradation of contact resistance of the SiC MOSFET.

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Plano, TX, United States of America

Fei Yang