Micron Technology Incorporated

Intel Corporation

Farrell Martin Good

Vishwanath Bhat

Irina V Vasilyeva

Santanu Sarkar

Sanh D Tang

Robert K Grubbs

Kyle B Campbell

Kyuchul Chong

Chris Braun

Kevin R Shea

Jay Steven Brown

Yongjun Jeff Hu

Anton J deVillers

Fatma Arzum Simsek-Ege

Shu Qin

Anand Srinivasan

Baosuo Zhou

Robert James Burke

Brett W Busch

Zishu Zhang

Gurpreet S Lugani

Robert C Carr

Xiaolong Fang

Jordan D Greenlee

Bhumika Chhabra

Adam William Saxler

John Mark Meldrim

Janos Fucsko

Andrea Gotti

Jerome A Imonigie

Kevin Lee Baker

Justin D Shepherdson

Yifen Liu

Ervin T Hill

Josiah Jebaraj Johnley Muthuraj

Kent H Zhuang

Naiming Liu

Everett A Mcteer

Benjamin E Greenwood

A microelectronic device comprises conductive structures and insulative structures vertically alternating with the conductive structures. At least one of the insulative structures includes interfacial regions extending inward from vertical boundaries of the at least one of the insulative structures, and central region vertically interposed between the interfacial regions. The interfacial regions are doped with one or more of carbon and boron. The insulative structures comprise a lower concentration of the one or more of carbon and boron than the interfacial regions. Additional microelectronic devices, electronic systems, and methods are also described.

Microelectronic devices including stack structures having doped interfacial regions, and related systems and methods

In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.

Plasma doping of gap fill materials

An electronic device comprising a stack structure comprising one or more stacks of materials and one or more silicon carbide materials adjacent to the one or more stacks of materials. The materials of the one or more stacks comprise a single chalcogenide material and one or more of a conductive carbon material, a conductive material, and a hardmask material. The one or more silicon carbide materials comprises silicon carbide, silicon carboxide, silicon carbonitride, silicon carboxynitride, and also comprise silicon-carbon covalent bonds. The one or more silicon carbide materials is configured as a liner or as a seal. Additional electronic devices are disclosed, as are related systems and methods of forming an electronic device.

Methods of forming electronic devices comprising silicon carbide materials

Techniques are described to form a liner to protect a material, such as a storage element material, from damage during subsequent operations or phases of a manufacturing process. The liner may be bonded to the material (e.g., a chalcogenide material) using a strong bond or a weak bond. In some cases, a sealant material may be deposited during an etching phase of the manufacturing process to prevent subsequent etching operations from damaging a material that has just been etched.

Protective sealant for chalcogenide material and methods for forming the same

A method of forming a microelectronic device comprises treating a base structure with a first precursor to adsorb the first precursor to a surface of the base structure and form a first material. The first precursor comprises a hydrazine-based compound including Si&#x2014;N&#x2014;Si bonds. The first material is treated with a second precursor to covert the first material into a second material. The second precursor comprises a Si-centered radical. The second material is treaded with a third precursor to covert the second material into a third material comprising Si and N. The third precursor comprises an N-centered radical. An ALD system and a method of forming a seal material through ALD are also described.

Methods of forming a microelectronic device, and related systems and additional methods

A new liner structure for improving memory cell design is disclosed that incorporates a boron nitride dielectric layer. An example memory device includes an array of memory cells with each of at least some of the memory cells having a stack of layers, the stack comprising at least one phase change layer. A dielectric layer is provisioned over one or more sidewalls of at least the phase change layer. The dielectric layer comprises both nitrogen and boron. The dielectric layer may be part of a liner structure that includes multiple layers, such as an alternating layer stack of boron nitride and silicon nitride. The dielectric layer can be deposited at low temperature (e.g., less than about 300&#xb0; C.) while maintaining a low hydrogen content and a relatively high thermal conductivity.

Memory device with boron nitride liner

An electronic device comprising a stack structure comprising one or more stacks of materials and a metal oxide material adjacent to the stacks of materials. The materials of the stacks comprise one or more chalcogenide materials. The metal oxide material comprises aluminum oxide, aluminum silicate, hafnium oxide, hafnium silicate, zirconium oxide, zirconium silicate, or a combination thereof and the metal oxide material extends continuously from an upper portion of the one or more stacks of materials to a lower portion of the one or more stacks of materials. Additional electronic devices are disclosed, as are related systems and methods of forming an electronic device.

Electronic devices comprising metal oxide materials and related methods and systems

Electronic devices comprising silicon carbide materials

Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a structural material for a semiconductor device. The structural material includes an orthosilicate derived oligomer having a number of oxygen (O) atoms each chemically bonded to one of a corresponding number of silicon (Si) atoms and a chemical bond formed between an element from group 13 of a periodic table of elements (e.g., B, Al, Ga, In, and Tl) and the number of O atoms of the orthosilicate derived oligomer. The chemical bond crosslinks chains of the orthosilicate derived oligomer to increase mechanical strength of the structural material, relative to the structural material formed without the chemical bond to crosslink the chains, among other benefits described herein.

Semiconductor structure formation

An oxidation barrier for non-volatile memory with materials sensitive to temperature and/or cross contamination (e.g., chalcogenide materials) are described The barrier can be formed, for example, around the boundaries of a non-volatile memory tile (also known as a block or sub-array). For example, a non-volatile memory device can include an oxidation barrier on a side wall of a trench between adjacent memory tiles.

Dielectric barrier at non-volatile memory tile edge

A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

Methods of forming devices including multi-portion liners

Devices including multi-portion liners

Methods of forming semiconductor structures including multi-portion liners

Growing community of inventors

Meridian, ID, United States of America

Farrell Martin Good