Globalfoundries Inc.

Globalfoundries U.S. Inc.

Faraz Khan

Toshiaki Kirihata

Darren Lane Anand

Norman Whitelaw Robson

Dan Moy

Danny Moy

Robert Katz

The present disclosure generally relates to semiconductor structures and, more particularly, to charge trap memory devices and methods of manufacture and operation. The semiconductor memory includes: a charge trap transistor comprising a gate structure, a source region and a drain region; and a self-heating circuit which selectively applies an alternating bias direction between the source region and the drain region of the charge trap transistor to provide an erase operation or a programming operation of the charge trap transistor.

Charge trap memory devices

The present disclosure generally relates to semiconductor structures and, more particularly, to program and erase memory structures and methods of manufacture. The semiconductor memory includes: a charge trap transistor; and a self-heating circuit which selectively applies voltages to terminals of the charge trap transistor to assist in erase operations of the charge trap transistor.

Program and erase memory structures

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Los Angeles, CA, United States of America

Faraz Khan