Taiwan Semiconductor Manufacturing Comp. Ltd.

Fang-Yu Liang

Kai-Chiang Wu

Ching-Feng Yang

Chih-Chiang Tsao

Hsiu-Jen Lin

A semiconductor package and a manufacturing method thereof are provided. A package substrate of a device includes a functional circuit structure in a central region of the package substrate and a seal ring structure in a peripheral region of the package substrate and electrically isolated from the functional circuit structure. The seal ring structure includes a via pattern including outer discrete features arranged in an outer loop and inner discrete features arranged in an inner loop between the outer loop and the functional circuit structure. In a top view, ends of adjacent two of the inner discrete features are spaced apart from each other by a non-zero distance, and one of the outer discrete features overlaps the non-zero distance.

Semiconductor package and manufacturing method thereof

A package structure including a semiconductor die, a redistribution layer, a plurality of antenna patterns, a die attach film, and an insulating encapsulant is provided. The semiconductor die have an active surface and a backside surface opposite to the active surface. The redistribution layer is located on the active surface of the semiconductor die and electrically connected to the semiconductor die. The antenna patterns are located over the backside surface of the semiconductor die. The die attach film is located in between the semiconductor die and the antenna patterns, wherein the die attach film includes a plurality of fillers, and an average height of the die attach film is substantially equal to an average diameter of the plurality of fillers. The insulating encapsulant is located in between the redistribution layer and the antenna patterns, wherein the insulating encapsulant encapsulates the semiconductor die and the die attach film.

Package structure with improved antenna patterns performance

A package component, a semiconductor package and a manufacturing method thereof are provided. The package component for electrically coupling a semiconductor die includes a functional circuit structure and a seal ring structure embedded in an insulating layer. The semiconductor die disposed on the package component is electrically coupled to the functional circuit structure. The seal ring structure is electrically isolated from the functional circuit structure, the seal ring structure includes a stack of alternating interconnect layers and via patterns, the via pattern at each level of the stack includes first features spaced apart from one another and arranged at neighboring corners of the insulating layer, and the first features are offset lengthwise relative to each other to overlap therewith, and the first features are spaced apart widthwise relative to each other.

Package component, semiconductor package and manufacturing method thereof

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a semiconductor die laterally covered by an insulating encapsulation, a first redistribution structure disposed on the semiconductor die and the insulating encapsulation, a second redistribution structure disposed opposite to the first redistribution structure, and a through insulating via (TIV) penetrating through the insulating encapsulation. The semiconductor die is electrically coupled to the first redistribution structure through the second redistribution structure and the TIV. The first redistribution structure includes a patterned conductive layer covered by a patterned dielectric layer, and under-ball metallurgy (UBM) pattern partially covered by the patterned dielectric layer. A first portion of the UBM pattern physically contacts a via portion of the patterned conductive layer which is tapered toward the UBM pattern, and a second portion of the UBM pattern is connected to the first portion and protruded from the patterned dielectric layer.

A package structure includes a semiconductor die, an insulating encapsulant, a redistribution layer and a plurality of antenna patterns. The semiconductor die has an active surface and a backside surface opposite to the active surface. The insulating encapsulant is encapsulating the semiconductor die. The redistribution layer is located on the active surface of the semiconductor die and over the insulating encapsulant. The plurality of antenna patterns is located over the semiconductor die, wherein the plurality of antenna patterns comprises a plurality of trenches located on a surface of the plurality of antenna patterns.

Package structure and method of fabricating the same

A package component, a semiconductor package and a manufacturing method thereof are provided. The package component for electrically coupling a semiconductor die includes an insulating layer, a functional circuit structure embedded in the insulating layer within a functional circuit region, and a seal ring structure embedded in the insulating layer within the seal ring region surrounding the functional circuit region. The semiconductor die disposed on the package component is electrically coupled to the functional circuit structure. The seal ring structure is electrically isolated from the functional circuit structure. The seal ring structure includes a stack of alternating interconnect layers and via patterns, and the via pattern at each level of the stack includes first features spaced apart from one another and arranged at neighboring corners of the seal ring region.

A method including followings is provided. An encapsulated device including a semiconductor die and an insulating encapsulation laterally encapsulating the semiconductor die is provided. An insulating layer is formed over a surface of the encapsulated device. A groove pattern is formed on the insulating layer. A conductive paste is filled in the groove pattern and the conductive paste filled in the groove pattern is cured.

Manufacturing method of semicondcutor package

A package structure including a semiconductor die, a redistribution layer, a plurality of antenna patterns, a die attach film, and an insulating encapsulant is provided. The semiconductor die has an active surface and a backside surface opposite to the active surface. The redistribution layer is located on the active surface of the semiconductor die and electrically connected to the semiconductor die. The antenna patterns are located over the backside surface of the semiconductor die. The die attach film is located in between the semiconductor die and the antenna patterns, wherein the die attach film includes a plurality of fillers, and an average height of the die attach film is substantially equal to an average diameter of the plurality of fillers. The insulating encapsulant is located in between the redistribution layer and the antenna patterns, wherein the insulating encapsulant encapsulates the semiconductor die and the die attach film.

Package structure

A semiconductor package includes an encapsulated semiconductor device, a first redistribution structure, an insulating layer, and an antenna. The encapsulated semiconductor device includes a semiconductor device encapsulated by an encapsulation material. The redistribution structure is disposed on a first side the encapsulated semiconductor device and electrically connected to the semiconductor device. The insulating layer is disposed on a second side of the encapsulated semiconductor device and comprises a groove pattern. The antenna is filled the groove pattern, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer.

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Taipei, Taiwan

Fang-Yu Liang