Applied Materials, Inc.

Fabrice Geiger

Frederic Gaillard

Ellie Y Yieh

Li-Qun Xia

Tian H Lim

A method for forming a trench isolation structure on a substrate. The method includes applying a pad oxide layer () on the substrate (), applying a polysilicon layer () over the pad oxide layer, and applying a CVD anti-reflective coating (ARC) () over the polysilicon layer. A photoresist is formed on the CVD ARC and a trenched is etched at a desired location. One embodiment provides a method for depositing a trench oxide filling layer () on the trenched substrate utilizing the surface sensitivity of dielectric materials such as O/TEOS to achieve a substantially self-planarized dielectric layer. Prior problems with porous trench fill, particular near trench corners, are obviated by use of the polysilicon layer. After deposition, an oxidizing anneal can be performed to grow a thermal oxide () at the trench surfaces and densify the dielectric material. A chemical mechanical polish can be used to remove the excess oxide material, including the porous regions.

Integration scheme using self-planarized dielectric layer for shallow trench isolation (STI)

The present invention relates to a method for providing a dielectric film having a low dielectric constant that is particularly useful as an intermetal dielectric layer. The method of the present invention deposits a porous oxide gap fill layer from a process gas of ozone and TEOS. The gap fill layer is deposited over a surface sensitive lining layer (as opposed to a non-surface sensitive layer as is commonly done in the industry) using deposition conditions that maximize the amount of carbon that is incorporated into the gap fill layer and result in a porous silicon oxide film. A typical SACVD ozone/TEOS gap fill layer has a carbon content of about 2-3 atomic percent (at. %). An SACVD ozone/TEOS gap fill layer deposited according to the present, however, has a carbon content of at least 5 at. % and preferably has a carbon content of between about 7-8 at. %. Incorporating such a high carbon content into the porous SACVD gap fill layer helps stabilize the layer so it is not susceptible to moisture absorbtion and outgassing problems as is a lower carbon content porous SACVD ozone/TEOS film. In one embodiment, the method of the present invention increases the carbon content of the SACVD ozone/TEOS layer by depositing the layer at a temperature of less than 400&deg; C. and deposits a porous film over the surface sensitive layer by using a relatively high ozone to TEOS ratio. Silicon oxide films deposited according to the present invention have a dielectric constant of 3.2 and below and exhibit good film stability. Such films are particularly useful in sub-0.2 micron IMD applications.

Process for depositing a porous, low dielectric constant silicon oxide film

A method for depositing a trench oxide filling layer ( ) on a trenched substrate ( ) utilizes the surface sensitivity of dielectric materials such as O /TEOS. Such materials have different desposition rates on differently constituted surfaces at different levels on the trenched substrate ( ) so that the surface profile of the deposited layer ( ) is substantially self-planarized. Depositing the dielectric material on a silicon trench ( ) produces a high quality filling layer, and cleaning the trench ( ) prior to desposition can increase the quality. After desposition, an oxidizing anneal can be performed to grow a thermal oxide ( ) at the trench surfaces and densify the dielectric material. A chemical mechanical polish can be used to remove the excess oxide material above an etch stop layer ( ) of the substrate ( ) which can be formed of LPCVD nitride or CVD anti-reflective coating.

Methods for forming self-planarized dielectric layer for shallow trench isolation

The present invention provides exemplary methods, apparatus and systems for planarizing an insulating layer, such as a borophosphosilicate glass (BPSG) layer, deposited over a substrate. In one embodiment, a substrate ( ) is inserted into a substrate processing chamber and a BPSG layer ( ) is deposited thereover. The BPSG layer has an upper surface that is generally non-planar, due in part to the underlying nonplanar substrate surface ( ). The substrate is exposed to an ultraviolet (UV) light ( ) at conditions sufficient to cause a reflow of the BPSG layer so that the BPSG layer upper surface ( ) is generally planar. In this manner, photonic energy is used to promote BPSG reflow, thereby reducing the thermal budget requirements for such a process.

Low thermal budget solution for PMD application using sacvd layer

A method for providing a dielectric film having a low dielectric constant. The deposited film is particularly useful as an intermetal or premetal dielectric layer in an integrated circuit. The low dielectric constant film is a carbon-doped silicon oxide layer deposited from a thermal, as opposed to plasma, CVD process. The layer is deposited from a process gas of ozone and an organosilane precursor having at least one silicon-carbon (Si&mdash;C) bond. During the deposition process the wafer is heated to a temperature less than 250&deg; C. and preferably to a temperature between 100-200&deg; C. Enhancements to the process include adding Boron and/or Phosphorus dopants, two step deposition, and capping the post cured layer.

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Meylan, France

Fabrice Geiger