Globalfoundries U.S. 2 LLC

Evan G Colgan

Daniel C Edelstein

Qinghuang Lin

Roy Rongqing Yu

Sri Muthuthamby Sri-Jayantha

Robert L Wisnieff

Steven Alan Cordes

Vijayeshwar Das Khanna

Peter Jerome Sorce

Kenneth F Latzko

The present disclosure relates to methods and devices for manufacturing a three-dimensional chip package. A method includes forming a linear groove on an alignment rail, attaching an alignment rod to the linear groove, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail. Another method includes forming an alignment ridge on an alignment rail, forming alignment channels on a plurality of integrated circuit chips, and aligning the plurality of integrated circuit chips by stacking the plurality of integrated circuit chips along the alignment rail.

Alignment of integrated circuit chip stack

Growing community of inventors

Chestnut Ridge, NJ, United States of America

Evan G Colgan