Taiwan Semiconductor Manufacturing Comp. Ltd.

General Semiconductor, Inc.

General Instrument Corporation of Delaware

Kras Asia Ltd.

Eugene Chen

Ming Chyi Liu

Chia-Shiung Tsai

Alexander Kalnitsky

Chung-Yi Yu

Po-Chun Liu

Yeur-Luen Tu

Cheng-Ta Wu

Yu-Hung Cheng

Chen-Hao Chiang

Jhih-Bin Chen

Wing Lun Wong

Boon Meng Chan

Hohn Jong Hsiung

Kuang Hann Lin

Chen-Hua Douglas Yu

Ru-Liang Lee

Chen Yu Chen

In some embodiments, a method for forming a semiconductor device is provided. The method includes etching a substrate to form a recess within a surface of the substrate. An epitaxial material is formed within the recess, a capping structure is formed on the epitaxial material, and a capping layer is formed onto the capping structure. The capping layer laterally extends past an outermost sidewall of the capping structure. Dopants are implanted into the epitaxial material. Implanting the dopants into the epitaxial material forms a first doped region having a first doping type and a second doped region having a second doping type.

Capping structure to reduce dark current in image sensors

In some embodiments, the present disclosure relates to a high-resistivity silicon-on-insulator (SOI) substrate, including a first polysilicon layer arranged over a semiconductor substrate. A second polysilicon layer is arranged over the first polysilicon layer, and a third polysilicon layer is arranged over the second polysilicon layer. An active semiconductor layer over an insulator layer may be arranged over the third polysilicon layer. The second polysilicon layer has an elevated concentration of oxygen compared to the first and third polysilicon layers.

Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer

In some embodiments, a semiconductor device is provided. The semiconductor device includes an epitaxial structure having a group IV chemical element disposed in a semiconductor substrate, where the epitaxial structure extends into the semiconductor substrate from a first side of the semiconductor substrate. A photodetector is at least partially arranged in the epitaxial structure. A first capping structure having a first capping structure chemical element that is different than the first group IV chemical element covers the epitaxial structure on the first side of the semiconductor substrate. A second capping structure is arranged between the first capping structure and the epitaxial structure, where the second capping structure includes the group IV chemical element and the first capping structure chemical element.

In some embodiments, the present disclosure relates to a method of forming a package assembly. A wet etch stop layer is formed over a frontside of a semiconductor substrate. A sacrificial semiconductor layer is formed over the wet etch stop layer, and a dry etch stop layer is formed over the sacrificial semiconductor layer. A stack of semiconductor device layers may be formed over the dry etch stop layer. A bonding process is performed to bond the stack of semiconductor device layers to a frontside of an integrated circuit die, wherein the frontside of the semiconductor substrate faces the frontside of the integrated circuit die. A wet etching process is performed to remove the semiconductor substrate, and a dry etching process is performed to remove the wet etch stop layer and the sacrificial semiconductor layer.

Double etch stop layer to protect semiconductor device layers from wet chemical etch

Various embodiments of the present application are directed towards a method for forming an integrated chip in which a group III-V device is bonded to a substrate, as well as the resulting integrated chip. In some embodiments, the method includes: forming a chip including an epitaxial stack, a metal structure on the epitaxial stack, and a diffusion layer between the metal structure and the epitaxial stack; bonding the chip to a substrate so the metal structure is between the substrate and the epitaxial stack; and performing an etch into the epitaxial stack to form a mesa structure with sidewalls spaced from sidewalls of the diffusion layer. The metal structure may, for example, be a metal bump patterned before the bonding or may, for example, be a metal layer that is on an etch stop layer and that protrudes through the etch stop layer to the diffusion layer.

Structures for bonding a group III-V device to a substrate by stacked conductive bumps

A method for wafer to wafer bonding for III-V and CMOS wafers is provided. A silicon carrier wafer is provided having an epitaxial III-V semiconductor region and an oxide region disposed over the wafer top surface, the regions having substantially equal heights. A sidewall of the epitaxial III-V semiconductor region directly contacts a sidewall of the oxide region. A eutectic bonding layer is formed over a top surface of the epitaxial III-V semiconductor region and the oxide region for bonding to the CMOS wafer which contains semiconductor devices. The silicon carrier wafer is removed, and the CMOS wafer is singulated to form a plurality of three-dimensional integrated circuits, each including a CMOS substrate corresponding to a portion of the CMOS wafer and a III-V optical device corresponding to a portion of the III-V epitaxial semiconductor region.

Wafer to wafer bonding techniques for III-V wafers and CMOS wafers

In a method of injection molding elements, a first step is to charge a molding compound into an injection nozzle via a side hole defined in the nozzle under the control of a mini-plunger which is selectively reciprocally movable within a bore of the injection nozzle. In a second step, the mini-plunger is reciprocally moved in the bore of the nozzle for injecting substantially the entire molding compound in the bore of the injection nozzle into at least one cavity of a mold via a separate gate passage defined in the mold. Each gate passage is a narrow capillary aperture that connects the bore of the injection nozzle with a different one of the at least one cavity of the mold. In a third step, the nozzle and the mold are separated after the molding compound in the gate passage is cured but before the molding compound in the at least one cavity of the mold is cured. In a fourth step the molded element is removed from the at least one cavity of the mold once the molding compound therein is cured.

Method of injection molding elements such as semiconductor elements

An electroplating apparatus comprises a rotating cage with a shaft therethrough and connecting seats, each of the connecting seats being tangent to the shaft, and a plurality of containers which are respectively received in each of the connecting seats. Each of the containers comprises a thin box and a screen provided thereon as a cap, and each box includes a plurality of spaced apart baffle plates sub-dividing the box into a plurality of compartments. Each of the compartments has two side walls which are respectively provided with a plurality of thorns, so as to form two thorny walls. All electronic parts are disposed in parallel between the thorny walls to avoid entanglements and damage of parts being electroplated. Also, the thorns provide extended area electrode contacts for the parts, resulting in more uniform parts plating.

Electroplating apparatus

An injection molding apparatus includes a nozzle which is directly connected to a mold for injecting a molding material into the mold. The mold defines at least one cavity in the shape of a element to be molded and at least one gate passage, each gate passage interconnecting a separate cavity with the nozzle. The shape of the gate passage permits a rapid curing of any residual molding material, and permits separation of the mold and the nozzle before the molding material in each cavity is cured. The nozzle is then used for a subsequent procedure or molding process while the molding material in the cavity cures. The nozzle defines a first bore and a second bore arranged longitudinally in sequence, and a side hole for introducing the molding material into the first bore. The nozzle includes a first plunger which is selectively reciprocally movable in the first bore, and a second plunger which is selectively reciprocally movable in the second bore and in a central bore defined in the first plunger. To charge a mold, the first plunger is moved to expose the side hole and control the flow of molding material into the second bore while the second plunger is extended into the second bore. The second plunger is raised to permit the first plunger to inject the molding material into each cavity via the second bore and each gate passage. The second plunger is then extended to purge any residue molding material from the nozzle.

Growing community of inventors

Taipei, Taiwan

Eugene Chen