Micron Technology Incorporated

Nan Ya Technology Corporation

Erik R Byers

Anton J deVillers

Scott E Sills

Nancy M Lomeli

Steve W Bowes

Chet E Carter

Justin D Shepherdson

Yifen Liu

George Matamis

William Arthur Stanton

Mark E Jost

Byron Neville Burgess

Tecla Ghilardi

Keith R Cook

William J Baggenstoss

John F Van Itallie

John David Hopkins

Lifang Xu

Paolo Tessariol

Justin B Dorhout

Adam William Saxler

Indra V Chary

Matthew J King

Kunal Shrotri

Anish A Khandekar

Jianming Zhou

Damir Fazil

Andrew Li

Diem Thy N Tran

Wei Yeeng Ng

Dimitrios Pavlopoulos

Merri Lyn Carlson

Nicholas R Tapias

Joel D Peterson

Eldon Nelson

A microelectronic device comprises a first set of tiers, each tier of the first set of tiers comprising alternating levels of a conductive material and an insulative material and having a first tier pitch, a second set of tiers adjacent to the first set of tiers, each tier of the second set of tiers comprising alternating levels of the conductive material and the insulative material and having a second tier pitch less than the first tier pitch, a third set of tiers adjacent to the second set of tiers, each tier of the third set of tiers comprising alternating levels of the conductive material and the insulative material and having a third tier pitch less than the second tier pitch, and a string of memory cells extending through the first set of tiers, the second set of tiers, and the third set of tiers. Related microelectronic devices, electronic systems, and methods are also described.

Memory devices including different tier pitches, and related electronic systems

Some embodiments include a structure having an opening extending into an integrated configuration. A first material is within the opening, and is configured to create an undulating topography relative to a sidewall of the opening. The undulating topography has a surface roughness characterized by a mean roughness parameter Rwhich is the mean peak-to-valley distance along the undulating topography. The Ris at least about 4 nm. A second material is within the opening and along at least a portion of the undulating topography. The first and second materials are compositionally different from one another. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.

Integrated assemblies having rugged material fill, and methods of forming integrated assemblies

Microelectronic devices including varying tier pitch, and related electronic systems

A method used in forming a memory array comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. The stack comprises an insulator tier above the wordline tiers. The insulator tier comprises first insulator material comprising silicon, nitrogen, and one or more of carbon, oxygen, boron, and phosphorus. The first insulator material is patterned to form first horizontally-elongated trenches in the insulator tier. Second insulator material is formed in the first trenches along sidewalls of the first insulator material. The second insulator material is of different composition from that of the first insulator material and narrows the first trenches. After forming the second insulator material, second horizontally-elongated trenches are formed through the insulative tiers and the wordline tiers. The second trenches are horizontally along the narrowed first trenches laterally between and below the second insulator material. Elevationally-extending strings of memory cells are formed in the stack. Structure independent of method is disclosed.

Memory arrays and methods used in forming a memory array

Microelectronic devices including a varying tier pitch, and related electronic systems and methods

Epitaxial growth methods and devices are described that include a textured surface on a substrate in a liquid crystal device. Geometry of the textured surface provides a organization of a liquid crystal media.

Textured devices

Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Epitaxial devices

Method for epitaxial devices

A reticle for lens heating mitigation includes a substrate, a target pattern and a redistributive pattern. The substrate includes a live pattern region and the target pattern is disposed within the live pattern region for constructing the target pattern onto a wafer. The redistributive pattern is also disposed within the live pattern region for redistributing energy onto a lens without being printed onto the wafer and without correcting said target pattern to be printed onto the wafer.

Reticle design for the reduction of lens heating phenomenon

Epitaxial devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Epitaxial growth method

Methods and apparatuses for configuring radiation used in microlithographic processing of workpieces are disclosed herein. One particular embodiment of such a method comprises directing a radiation beam along a radiation path from a reticle to an adjustment structure. The radiation beam has a wavefront with a first configuration in an image plane generally transverse to the radiation path. The method continues by changing at least one independently controllable parameter of the adjustment structure to change the wavefront of the radiation beam from the first configuration to a second configuration. After changing the shape of the wavefront from the first configuration to the second configuration, the method continues by impinging the radiation beam on the workpiece.

Methods and apparatuses for configuring radiation in microlithographic processing of workpieces using an adjustment structure

Reticles having reticle patterns suitable for reducing edge of array effects are provided. The reticle patterns have unresolvable patterns formed in the periphery areas of the reticle patterns. The unresolvable patterns are non-transparent with respect to patterning radiation. Systems incorporating the reticles are also provided. Additionally, methods of forming and using the reticles are provided.

Reticles and methods of forming and using the same

The invention includes a photolithographic method in which overlapping first and second exposure patterns are formed on a photosensitive material from light passed through a single reticle. The first exposure pattern of the radiation comprises features separated by about a minimum feature spacing that can be accomplished with a single reticle exposure at the time of the photolithographic processing, and the overlapping first and second patterns comprise features separated by less than the minimum feature spacing. The invention also includes a photolithographic method of forming overlapping exposure patterns on a photosensitive material from light passed through a single reticle wherein the reticle is moved between a first exposure to a first light and a second exposure to a second light.

Photolithographic methods of using a single reticle to form overlapping patterns

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Boise, ID, United States of America

Erik R Byers