Advanced Micro Devices Corporation

Adeia Semiconductor Bonding Technologies Inc.

Cisco Technology, Inc.

Globalfoundries Inc.

Procket Networks, Inc.

Eric Tosaya

Liang Wang

Tom Ley

Alex Tain

Rajesh Katkar

Jun Zhai

Edward S Alcid

Chia-Ken Leong

Cyprian Emeka Uzoh

Charles Gerard Woychik

Shrikar Bhagath

Thomas S Tarter

Nhon T Do

Disclosed herein are technologies for forming a plurality of known good die (KGD)-light emitting diode (LED) components into a larger size optically coherent LED chips or devices. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Light emitting diode device with reconstituted LED components on substrate

A workpiece () has protruding conductive features () at least on a first side. The second side is processed while the workpiece is held from the first side by a holder (H). To prevent damage to the protruding features and flatten the workpiece (which could be otherwise warped), a spacer () is inserted between the workpiece and the holder. The spacer has holes () receiving the protruding features. The workpiece can be held by forces generated by the holder such as vacuum or an electrostatic force, without an adhesive. Other features and advantages are provided.

Holding of interposers and other microelectronic workpieces in position during assembly and other processing

A microelectronic component () has a contact pad (C,C,C) recessed in a cavity () and covered by underfill tape (). The cavity has a void (V) below the underfill tape. A protruding contact pad of another microelectronic component ruptures the underfill tape to enter the cavity and bond to the recessed contact pad. The void helps in rupturing the underfill tape, thus reducing the amount of underfill residue between the two contact pads and improving the contact resistance. Also provided is a microelectronic component having a substrate with a cavity and having a through-substrate via extending into the cavity. Other features are also provided.

Use of underfill tape in microelectronic components, and microelectronic components with cavities coupled to through-substrate vias

Various semiconductor chip packages and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a substrate that has a first side and a first plurality of passive devices on the first side. A stiffener frame is coupled on the first side. The stiffener frame has first and second spaced apart opposing walls that define a channel in which the first plurality of passive devices is positioned, and a central opening that does not cover a central portion of the first side of the substrate.

Chip package with channel stiffener frame

A method of routing connections of an integrated circuit package having a set of top side conductors and bottom side conductors. The method includes defining at least one distribution layer within the package, and positioning a set of upper vias between the set of top side conductors and the distribution layer. A set of lower vias is positioned between the distribution layer and the set of bottom side conductors that correspond to the set of top side conductors. One or more connections on the distribution layer are routed between the set of upper vias and the set of lower vias. In this manner, the one or more top side conductors are coupled automatically with their respective one or more bottom side conductors. This process may be implemented using one or more computer modules or computer operations.

Method for automatically routing connections between top side conductors and bottom side conductors of an integrated circuit package

A method for logically connecting at least one of a plurality of top side conductors of an integrated circuit package with at least one of a plurality of bottom side conductors of the integrated circuit package. The method includes drawing a layout of the bottom side conductors, and drawing a layout of the top side conductors. One or more rings of the top side conductors are defined, and one or more rings of the bottom side conductors are defined. One or more signal sets of the top side conductors are defined, each of said signal sets contains at least two or more top side conductors. The user can select a region of top side conductors to be connected with a region of bottom side conductors, and the selected region of top side conductors is automatically connected with the selected region of bottom side conductors while maintaining the signal set relations. In this manner, the logical connection between the top and bottom side conductors of an integrated circuit package are automatically connected while maintaining the relationship between the signal sets defined by the user. A netlist can be generated of the logical connections made by the connecting operation.

Method for automatically connecting top side conductors with bottom side conductors of an integrated circuit package

A heat spreader-package assembly is provided having a heat spreader mounted to a package board with an adhesive. The heat spreader has an upper portion and a plurality of sidewalls extending from the upper portion. The heat spreader has a flange that extends from the sidewalls continuously about a periphery of the upper portion and has a plurality of holes. The holes allow the uncured adhesive to flow therethrough. When the adhesive has cured, a head is formed from the adhesive on an upper side of the flange to establish a riveted connection.

Heat spreader having holes for rivet-like adhesive connections

An intregrated circuit package, which has an intregrated circuit die thereto, is mounted to a system board. The ground trace of the system board is connected to the package, which has a pluality of ground leads on its surface. An electrically conductive epoxy is placed on the ground leads and adheres the package lid to the package board and ground the package lid. A heat sink is mounted to the package lid with an electrically conductive adhesive or electrically conductive slips that extend from a flange of the package lid to a flange of the heat sink to ground the heat sink.

Heat sink grounded to a grounded package lid

A method and apparatus for precoining a ball grid array (BGA) type package prior to electrical characterization of the package employs a heated pressing plate with a smooth, flat bottom. The heated pressing plate is controllably pressed against a plurality of solder balls attached to a chip scale package. The heated pressing planarizes the tops of the solder balls, thereby evening out height differences among the solder balls. With the height differences evened out, a grounding plate of a test fixture can be applied on the array of solder balls and reliably contact each of the solder balls that are to be grounded, regardless of their initial height differences.

Method and apparatus for precoining BGA type packages prior to electrical characterization

An extruded heat exchanger that reduces manufacturing costs and material waste, without compromising heat spreading effects. The heat exchanger has an upper surface that is thermally coupled to a heat sink. Two sidewalls extend only from opposite edges of the upper surface. A flange extends from each of the opposing sidewalls.

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Fremont, CA, United States of America

Eric Tosaya