S.o.i.tec Silicon on Insulator Technologies

S.o.i. Tec Silicon on Insulator Technologies, S.a.

Soitec

Eric Neyret

Christophe Maleville

Ludovic Ecarnot

Oleg Kononchuk

Nadia Ben Mohamed

Walter Schwarzenbach

Daniel Delprat

Patrick Reynaud

Sébastien Kerdiles

Marcel Broekaart

Alice Boussagol

Emmanuel Arene

Luciana Capello

Alexandra Abbadie

Marion Migette

Michael Stinco

Nadia Ben Mohammed

Sébastien Molinari

François Boedt

Michael Lotissement Les Balcons Du Guiers Stinco

Christophe Malleville

The invention provides a method of trimming a structure that includes a first wafer bonded to a second wafer, with the first wafer having a chamfered edge. The method includes a first trimming step carried out over a first depth that includes at least the thickness of the first wafer and over a first width determined from the edge of the first wafer. A second trimming step is then carried out over a second depth that includes at least the thickness of the first wafer and over a second width that is less than the first width.

Progressive trimming method

A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.

Treatment for bonding interface stabilization

The invention relates to a finishing method for a silicon-on-insulator (SOI) substrate that includes an oxide layer buried between an active silicon layer and a support layer of silicon. The method includes applying the following steps in succession: a first rapid thermal annealing (RTA) of the SOI substrate; a sacrificial oxidation of the active silicon layer of the substrate conducted to remove a first oxide thickness; a second RTA of the substrate; and a second sacrificial oxidation of the active silicon layer conducted to remove a second oxide thickness that is thinner than the first oxide thickness.

Finishing method for a silicon on insulator substrate

Methods for forming semiconductor structures comprising a layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect to defects and resulting structures therefrom. For example, a semiconductor-on-insulator (SeOI) structure can be formed by a method comprising:&#x2014;providing a donor substrate having a first density of vacancy clusters;&#x2014;providing an insulating layer; &#x2014;transferring a thin layer from the donor substrate to a support substrate with the insulating layer thereon;&#x2014;curing the transferred thin layer to reduce the first density of vacancy clusters to a second density; and being characterized in that the step of providing an insulating layer comprises providing an oxygen barrier layer to be in contact with the transferred thin layer, the oxygen barrier layer limiting diffusion of oxygen toward the thin layer during the curing.

Process for the transfer of a thin layer formed in a substrate with vacancy clusters

The invention relates to a method for fabricating a semiconductor on insulator substrate, in particular a silicon on insulator substrate by providing a source substrate, providing a predetermined splitting area inside the source substrate by implanting atomic species, bonding the source substrate to a handle substrate, detaching a remainder of the source substrate from the source-handle component at the predetermined splitting area to thereby transfer a device layer of the source substrate onto the handle substrate, and thinning of the device layer. To obtain semiconductor on insulator substrates with a reduced Secco defect density of less than 100 per cmthe implanting is carried out with a dose of less than 2.3&#xd7;10atoms per cmand the thinning is an oxidation step conducted at a temperature of less than 925&#xb0; C.

Method for fabricating a semiconductor on insulator substrate with reduced Secco defect density

A process for fabricating a silicon on insulator (SOI) substrate by co-implanting atomic or ionic species into a semiconductor donor substrate to form a weakened zone therein, the weakened zone forming a boundary between a thin silicon active layer and the remainder of the donor substrate. The donor substrate is then bonded to a semiconductor receiver substrate by molecular adhesion, resulting in a layer of buried silicon interposed between the donor substrate and the receiver substrate. The remainder of the donor substrate is detached along the weakened zone to obtain a SOI substrate with the receiver substrate covered with the buried oxide layer and the thin silicon active layer. The silicon active layer is then thermally annealed for at least 10 minutes in a gaseous atmosphere containing hydrogen, argon or both at a temperature of at least 950&#xb0; C. but not exceeding 1100&#xb0; C. The annealing step minimizes roughness of the surface of the silicon active layer, prevents reduction in thickness of the buried oxide layer, and achieves uniform thickness of the thin silicon active layer and the buried oxide layer.

Process for fabricating a substrate of the silicon-on-insulator type with reduced roughness and uniform thickness

A method for reducing the roughness of a free surface of a semiconductor wafer that includes establishing a first atmosphere in an annealing chamber, replacing the first atmosphere with a second atmosphere that includes a gas selected to and in an amount to substantially eliminate or reduce pollutants on a wafer, and exposing the free surface of the wafer to the second atmosphere to substantially eliminate or reduce pollutants thereon. The second atmosphere is then replaced with a third atmosphere that includes pure, and rapid thermal annealing is performed on the wafer exposed to the third atmosphere in the annealing chamber to substantially reduce the roughness of the free surface of the wafer.

Method of reducing the surface roughness of a semiconductor wafer

The invention provides a method for reducing the roughness of a free surface of a semiconductor wafer that includes removing material from the free surface of the wafer to provide a treated wafer, and performing a first rapid thermal annealing on the treated wafer in a pure argon atmosphere to substantially reduce the roughness of the free surface of the treated wafer. The material removal is selected and conducted to improve the effectiveness of the subsequent rapid thermal annealing in reducing the roughness of the free surface of the treated wafer.

A process for fabricating a silicon on insulator (SOI) substrate by forming a weakened zone within a semiconductor donor substrate to define a thick layer having a thickness of greater 150 nm and form a boundary between the thick layer and a remainder of the donor substrate, bonding the donor substrate to a semiconductor receiver substrate, with one of the substrates including an oxide layer that is present between the donor and receiver substrates after bonding; detaching a remainder of the donor substrate along the weakened zone to obtain a semifinished SOI substrate comprising the receiver substrate, the oxide layer and the thick layer; and finishing the semifinished SOI substrate by thinning the thick layer to obtain a silicon layer having a thickness is less than that of the thick layer but greater than 150 nm; long annealing the semifinished SOI substrate in a gaseous atmosphere comprising hydrogen and/or argon; and thinning the thin layer to obtain an ultrathin layer with a thickness of 150 nm or less and the finished substrate.

Process for fabricating a substrate of the silicon-on-insulator type with thin surface layer

The invention relates to a process for the formation of a structure comprising a thin layer made of semiconductor material on a substrate, including the steps of providing a zone of weakness in a donor substrate; bonding the donor substrate to a support substrate; detaching a portion of the donor substrate to transfer it to the support substrate, wherein the detaching includes applying heat treating the donor substrate to weaken the zone of weakness without initiating detachment and applying an energy pulse to provoke self-maintained detachment of the donor substrate portion to transfer it to the support substrate; and subjecting the transferred portion of the donor substrate to a finishing operation to form a thin layer. The finishing operation is simplified compared to that which is conducted by a conventional process that achieves detaching by applying a heat treatment to provoke self-maintained detachment of the donor substrate portion, and the thin layer has a surface of the same smoothness as one prepared by the conventional process.

Finishing process for the manufacture of a semiconductor structure

A method for configuring a process for treating a semiconductor wafer. A minimum layer thickness of a transferred layer to be provided is determined to obtain a processed layer that has a preselected target thickness and target maximum density of through holes that extend completely therethrough, by conducting a predetermined finishing sequence of operations that improve the surface quality of the layer. The minimum thickness is determined such that the density of through holes remains below the target maximum density after each operation in the finishing sequence.

Method of configuring a process to obtain a thin layer with a low density of holes

This invention provides methods for manufacturing compound-material wafers and methods for recycling donor substrates that results from manufacturing compound-material wafers. The provided methods includes at least one further thermal treatment step configured to at least partially reduce oxygen precipitates and/or nuclei. Reduction of oxygen precipitates and/or nuclei, improves the recycling rate of the donor substrate.

Methods for manufacturing compound-material wafers and for recycling used donor substrates

Processes for forming semiconductor structure comprising a transfer layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect to defects and resulting structures therefrom. For example, a semiconductor on insulator ('SeOI') structure can be formed using a donor substrate, a support substrate and an insulating layer. The donor substrate may be formed using CZ pulling of semiconductor material at a rate that results in the existence of vacancy clusters. An insulating layer for the SeOI structure can be formed by depositing an oxide layer on the donor or support substrate. An insulating layer can also be formed by thermal oxidizing the support substrate. An SeOI structure can be formed by combining the donor substrate, the support substrate, and the insulating layer there between, and detaching the combination including a thin layer of the donor substrate using a zone of weakness that was formed in the donor substrate. In some embodiments, the donor substrate is initially formed using a technique that results in lower COPs quality or density that if the donor substrate was formed from a Very Slow Pull, and after curing of the thin layer formed therefrom, results in a structure having COPs quality or density that is better than a near perfect crystalline structure.

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Sassenage, France

Eric Neyret