International Business Machines Corporation

Eric Lee Carter

Michael Richard Ouellette

Moon Ho Lee

Michael H Wood

Roger Paul Gregor

Eugene James Nosowicz

Geoffrey Wang

Harold T Ward

A multi-port electronic memory has a write through capability. Control features for enabling a write through path to an output and subsequently disabling without causing data errors due to design and technology variations are provided. Control features are especially beneficial for use with compilable SRAM books.

Write through function for a memory

A two-port memory cell design which permits simultaneous reading and writing of cells which are on the same wordline but on different Bit Select lines without increase in Read Access Time, and while maintaining memory functionality at low voltages. The memory cell uses a standard 6 transistor design to provide a differential read for fast access plus another three transistors are added to each cell to provide a means of differentially writing the cell and de-gating the write if the bit-select is not active. This cell design has applicability to multi-port memories as well.

High density two port SRAM cell for low voltage CMOS applications

A modular modulus-N residue circuit apparatus uses cascode logic networks in the modules for generating greater than one odd integer N residues.

Circuit apparatus for generating modulus-N residues

An improved polarity hold latch is described having a set and reset capability integrated therein. As implemented, this latch provides the desired logical functions at a reduced circuit cost and power requirements. At the same time, it overcomes the need to test for and resolve potential signal race conditions. The improved latch is particularly susceptible of being implemented on a single chip.

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Endicott, NY, United States of America

Eric Lee Carter