Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Commissariat a L'energie Atomique

Soitec

Emmanuelle Lagoutte

Xavier Baillin

Jean-Louis Pornin

Sebastien Hentz

Sébastien Hentz

Charlotte Gillot

Eric Guiot

Thomas Signamarcheix

Fabrice Jacquet

Nicolas Sillon

Guillaume Rodriguez

An engineered substrate comprising: a seed layer made of a first semiconductor material for growth of a solar cell; a first bonding layer on the seed layer; a support substrate made of a second semiconductor material; a second bonding layer on a first side of the support substrate; a bonding interface between the first and second bonding layers; the first and second bonding layers each made of metallic material; wherein doping concentration and thickness of the engineered substrate, in particular, of the seed layer, the support substrate, and both the first and second bonding layers, are selected such that the absorption of the seed layer is less than 20%, preferably less than 10%, as well as total area-normalized series resistance of the engineered substrate is less than 10 mOhm&#xb7;cm, preferably less than 5 mOhm&#xb7;cm.

Engineered substrate with embedded mirror

A treatment method for a getter material is provided, including forming a protective layer on the thin layer getter material by performing at least one oxidation and/or nitriding step of the thin layer getter material conducted under dry atmosphere of dioxygen and/or dinitrogen, wherein the protective layer is composed of oxide and/or nitride of the thin layer getter material, and wherein a thickness of the protective layer is between approximately 1 nm and 10 nm.

Treatment method of a getter material and encapsulation method of such getter material

It consists of a microcomponent comprising a cavity () delimited by a cap () enclosing an active part () supported by a substrate (). The cap () comprises a top wall () comprising stiffening means with at least one projecting stiffening member (), said stiffening member () being located between two recessed areas () of the top wall () and having one end () at a distance from the recessed areas () without coming into contact with the substrate ().

Microcomponent provided with a cavity delimited by a cap with enhanced mechanical resistance

A process for manufacturing a device including a packaged microsystem. The manufactured device is in a form of a plane wafer, the microsystem being buried in the wafer. Therefore, the process is used to make a compound that may be used as a basis for other micro technology processes. Moreover, the process co-integrates electronic compounds when the device is being manufactured. The device is particularly suitable for MEMS, and particularly radiofrequency resonators.

Device comprising an encapsulated microsystem and production method thereof

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St Marcellin, France

Emmanuelle Lagoutte