Varian Semiconductor Equipment Associates, Inc.

Applied Materials, Inc.

Edwin A Arevalo

Jonathan Gerald England

Rajesh Prasad

Ludovic Godet

Anthony Renau

George D Papasouliotis

Vikram Singh

Richard S Muka

Christopher R Hatem

Ziwei Fang

Nobuyuki Sasaki

Daniel F Downey

Scott Falk

Venkataramana R Chavva

Deven Raj Mittal

Kyuha Shim

Tzu-Yu Liu

Somchintana Norasetthekul

Lauren Liaw

KyuHa Shim

Takaski Shimizu

Hans Gossmann

Ryuichi Muira

Hiro Ito

A system and method that allows higher energy implants to be performed, wherein the peak concentration depth is shallower than would otherwise occur is disclosed. The system comprises an ion source, an accelerator, a platen and a platen orientation motor that allows large tilt angles. The system may be capable of performing implants of hydrogen ions at an implant energy of up to 5 MeV. By tilting the workpiece during an implant, the system can be used to perform implants that are typically performed at implant energies that are less than the minimum implant energy allowed by the system. Additionally, the resistivity profile of the workpiece after thermal treatment is similar to that achieved using a lower energy implant. In certain embodiments, the peak concentration depth may be reduced by 3 &#x3bc;m or more using larger tilt angles.

System and technique for profile modulation using high tilt angles

A method may include depositing a mask layer on a substrate using physical vapor deposition, wherein an absolute value of a stress in the mask layer has a first value; and directing a dose of ions into the mask layer, wherein the absolute value of the stress in the mask layer has a second value, less than the first value, after the directing the dose.

Techniques for forming low stress mask using implantation

Techniques for temperature-controlled ion implantation are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for temperature-controlled ion implantation. The apparatus may comprise a platen to hold a wafer in a single-wafer process chamber during ion implantation, the platen including: a wafer clamping mechanism to secure the wafer onto the platen and to provide a predetermined thermal contact between the wafer and the platen, and one or more heating elements to pre-heat and maintain the platen in a predetermined temperature range above room temperature. The apparatus may also comprise a post-cooling station to cool down the wafer after ion implantation. The apparatus may further comprise a wafer handling assembly to load the wafer onto the pre-heated platen and to remove the wafer from the platen to the post-cooling station.

Techniques for temperature-controlled ion implantation

A method of plasma doping includes providing a dopant gas comprising a dopant heavy halogenide compound gas to a plasma chamber. A plasma is formed in the plasma chamber with the dopant heavy halogenide compound gas and generates desired dopant ions and heavy fragments of precursor dopant molecule. A substrate in the plasma chamber is biased so that the desired dopant ions impact the substrate with a desired ion energy, thereby implanting the desired dopant ions and the heavy fragments of precursor dopant molecule into the substrate, wherein at least one of the ion energy and composition of the dopant heavy halogenide compound is chosen so that the implant profile in the substrate is substantially determined by the desired dopant ions.

Ion implantation with heavy halogenide compounds

Techniques for forming shallow junctions are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for forming shallow junctions. The method may comprise generating an ion beam comprising molecular ions based on one or more materials selected from a group consisting of: digermane (GeH), germanium nitride (GeN), germanium-fluorine compounds (GF, wherein n=1, 2, or 3), and other germanium-containing compounds. The method may also comprise causing the ion beam to impact a semiconductor wafer.

Techniques for forming shallow junctions

A method and system to achieve shallow junctions using Electromagnetic Induction Heating (EMIH) that can be preceded or followed by a low-temperature Rapid Thermal Annealing (RTA) process. The methods and systems can use, for example, RF or microwave frequencies to induce electromagnetic fields that can induce currents to flow within the silicon wafer, thus causing ohmic collisions between electrons and the lattice structure that heat the wafer volumetrically rather than through the surface. Such EMIH heating can activate the dopant material. Defects in the silicon structure can be repaired by combining the EMIH annealing with a low-temperature (approximately 500&#x2013;800 degrees Celsius) RTA that causes minimal diffusion, thus minimizing the difference between the as-implanted junction depth and the post-annealing junction depth when compared to annealing methods that only use traditional RTA.

Athermal annealing with rapid thermal annealing system and method

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Haverhill, MA, United States of America

Edwin A Arevalo