Infineon Technologies Ag

Infineon Technologies Austria Ag

Intel Mobile Communications Gmbh

Other

Edward Fuergut

Joachim Mahler

Martin Gruber

Michael Bauer

Ralf Otremba

Irmgard Escher-Poeppel

Simon Jerebic

Holger Woerner

Markus Brunnbauer

Khalil Hosseini

Georg Meyer-Berg

Bernd Schmoelzer

Gottfried Beer

Ivan Nikitin

Peter Strobel

Hermann Vilsmeier

Juergen Hoegerl

Thomas Basler

Olaf Hohlfeld

Bernd Goller

Teck Sim Lee

Daniel Porwol

Horst Theuss

Jens G Pohl

Manfred Mengel

Thomas Bemmerl

Wolfgang Scholz

Horst Groeninger

Robert-Christian Hagen

Lee Shuang Wang

Michael Ledutke

Christian Kasztelan

Hans-Joachim Schulze

Thorsten Meyer

Manfred Engelhardt

Carsten Ahrens

Carsten Von Koblinski

Stephan Voss

Wolfram Hable

Chii Shang Hong

Hannes Eder

Bernd Roemer

Anton Mauder

Petteri Palm

Josef Hoeglauer

Klaus Schiess

Rainer Leuschner

Xaver Schloegel

Hans-Joerg Timme

Thomas Fischer

Dominic Maier

Andre Schmenn

Peter Kanschat

Juergen Schredl

Damian Sojka

Werner Kroeninger

Sanjay Kumar Murugan

Thai Kee Gan

Claus Waechter

Ke Yan Tean

Davide Chiola

Herbert Hopfgartner

Markus Fink

Markus Zundel

Alfons Dehe

Ralf Siemieniec

Roland Rupp

Reinhold Bayerer

Dethard Peters

Werner Schustereder

Bernhard Goller

Ravi Keshav Joshi

Stephan Pindl

Gudrun Stranzl

Paul Ganitzer

Chee Yang Ng

Peter Friedrichs

Christian Stuempfl

Alexander Roth

Uwe Kirchner

Rainer Steiner

Jochen Hilsenbeck

Anton Steltenpohl

Ulrich Wachter

Gerhard Poeppel

Michael Juerss

Philipp Seng

Daniel Pedone

Jayaganasan Narayanasamy

Franz Stueckler

Fabian Schnoy

Bernd Rakow

Chee Hong Lee

Amirul Afiq Hud

Guido Boenig

Stefan Woetzel

Andreas Huerner

Holger Doepke

Guenther Lohmann

Jo Ean Joanna Chye

A method for fabricating a semiconductor device includes: providing a die carrier; disposing a semiconductor die on a main face of the die carrier, the semiconductor die having one or more contact pads; applying an encapsulant at least partially to the semiconductor die and at least a portion of the main face of the die carrier; applying an insulation layer to the encapsulant; and fabricating electrical interconnects by forming openings into the encapsulant and the insulation layer and filling a conductive material into the openings. Additional methods for fabricating a semiconductor device are described.

Method for fabricating a semiconductor device including an embedded semiconductor die

An electronic module includes a semiconductor package including a die carrier, a semiconductor transistor die disposed on the die carrier, an electrical conductor connected to the semiconductor die, and an encapsulant covering the die carrier, the semiconductor die, and the electrical conductor so that a portion of the electrical conductor extends to the outside of the encapsulant. The electronic module further includes an interposer layer on which the semiconductor package is disposed, and a heat sink through which a cooling medium can flow. The interposer layer is disposed on the heatsink.

Electronic module including a semiconductor package disposed on an interposer layer

A power semiconductor device includes a semiconductor body having a front side surface, and a first passivation layer arranged above the front side surface. The first passivation layer is a polycrystalline diamond layer.

Power semiconductor device and method

A semiconductor package is provided. The semiconductor package may include at least one semiconductor chip including a contact pad configured to conduct a current, a conductor element, wherein the conductor element is arranged laterally overlapping the contact pad and with a distance to the contact pad, at least one electrically conductive spacer, a first adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the contact pad, and a second adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the conductor element, wherein the conductor element is electrically conductively connected to a clip or is at least part of a clip, and wherein the spacer is configured to electrically conductively connect the contact pad with the laterally overlapping portion of the conductor element.

Semiconductor package

A semiconductor device package comprises an electrically conductive carrier, a semiconductor die disposed on the carrier, an encapsulant encapsulating part of the carrier and the semiconductor die, an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure comprises a glass transition temperature in a range between −40° C. to 150° C.

Semiconductor device package comprising a thermal interface material with improved handling properties

An electronic module includes a semiconductor package, and a clip connected to the semiconductor package. The clip is connected to or includes at least one fastening element which is configured to make a connection to an external heat sink.

Electronic module comprising a semiconductor package with integrated clip and fastening element

A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.

Semiconductor device with improved performance in operation and improved flexibility in the arrangement of power chips

A semiconductor chip includes a semiconductor body having a main surface and a rear surface opposite the main surface, a first bond pad disposed on the main surface, a second bond pad disposed on the rear surface, a first switching device that is monolithically integrated in the semiconductor body and has a first input-output terminal that is electrically connected to the first bond pad, and a second switching device that is monolithically integrated in the semiconductor body and has a first input-output terminal that is electrically connected to the second bond pad.

Multi-device semiconductor chip with electrical access to devices at either side

A method includes providing a first lead frame that includes a first die pad and a first row of leads, providing a connection lug, mounting a first semiconductor die on the first die pad, the first semiconductor die including first and second voltage blocking terminals, electrically connecting the connection lug to one of the first and second voltage blocking terminals, electrically connecting a first one of the leads from the first row to an opposite one of the first and second voltage blocking terminals, and forming an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die. After forming the encapsulant body, the first row of leads each protrude out of a first outer face of the encapsulant body and the connection lug protrudes out of a second outer face of the encapsulant body.

Method of forming a semiconductor package with connection lug

A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.

Package with electrically insulated carrier and at least one step on encapsulant

A semiconductor device module includes a package carrier having an opening, wherein in the opening there is disposed a semiconductor package including a semiconductor die, an encapsulant, and first vertical contacts, wherein the encapsulant at least partially covers the semiconductor die, and the first vertical contacts are connected to the semiconductor die and extend at least partially through the encapsulant, and a first outer metallic contact layer electrically connected to the first vertical contacts.

Semiconductor device module having vertical metallic contacts and a method for fabricating the same

A semiconductor device includes a die carrier, a semiconductor die disposed on a main face of the die carrier, the semiconductor die including one or more contact pads, an encapsulant covering at least partially the semiconductor die and at least a portion of the main face of the die carrier, an insulation layer covering the encapsulant, and one or more electrical interconnects, each being connected with one of the one or more contact pads of the semiconductor die and extending through the encapsulant.

Semiconductor device including an embedded semiconductor die

A semiconductor package includes: a carrier having an electrically insulative body and a first contact structure at a first side of the electrically insulative body; and a semiconductor die having a first pad attached to the first contact structure of the carrier, the first pad being at source or emitter potential. The first pad is spaced inward from an edge of the semiconductor die by a first distance. The semiconductor die has an edge termination region between the edge and the first pad. The first contact structure of the carrier is spaced inward from the edge of the semiconductor die by a second distance greater than the first distance such that an electric field that emanates from the edge termination region in a direction of the carrier during normal operation of the semiconductor die does not reach the first contact structure of the carrier. Methods of production are also provided.

Semiconductor package having a chip carrier with a pad offset feature

Electronic module including a semiconductor package connected to a fluid heatsink

A package for mounting on a mounting base is disclosed. In one example, the package comprises a carrier, an electronic component mounted at the carrier, leads electrically coupled with the electronic component and to be electrically coupled with the mounting base, and a linear spacer for defining a spacing with respect to the carrier.

Linear spacer for spacing a carrier of a package

Growing community of inventors

Dasing, Germany

Edward Fuergut