Lsi Corporation

Lsi Logic Corporation

Synopsys, Inc.

Avago Technologies General IP (singapore) Pte. Ltd.

Ebo H Croffie

Nicholas K Eib

Neal Patrick Callan

Mario Garza

Christopher L Neville

Lav D Ivanovic

Qiliang Yan

Hongbo Zhang

Paul G Filseth

John V Jensen

Yongfa Fan

Colin D Yates

Nadya Strelkova

Lin Zhang

Peter Brooker

Qian Ren

Nicolas K Eib

The present invention provides methods and apparatus for accomplishing optical direct write phase shift lithography. A lithography system and method are provided wherein a mirror array is configured to generate vortex phase shift optical patterns that are directed onto a photosensitive layer of a substrate. The lithography methods and systems facilitate pattern transfer using such vortex phase shift exposure patterns.

Maskless vortex phase shift optical direct write lithography

A method and apparatus of a novel full chip edge-based mask three-dimensional (3D) model for performing photolithography simulation is described. The method applies a thin mask model to a mask design layout to create a thin mask transmission. The method generates a thick mask model that has a plurality of edge-based kernels. The method applies the thick mask model to the mask design layout to create a mask 3D residual. The method combines the thin mask transmission and the mask 3D residual to create a mask 3D transmission.

Edge-based full chip mask topography modeling

The present invention provides methods and apparatus for accomplishing a optical direct write phase shift lithography. A lithography system and method are provided wherein a mirror array is configured to generate vortex phase shift optical patterns that are directed onto a photosensitive layer of a substrate. The lithography methods and systems facilitate pattern transfer using such vortex phase shift exposure patterns.

The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.

Optimized mirror design for optical direct write

A method and system for utilizing a simplified resist process model to perform optical and process corrections. More specifically, the present invention provides a fast and easy post exposure bake (PEB) effects calculation which can be used in connection with OPC. The model can be used to increase OPC modeling accuracy, by taking PEB effects into consideration, without incurring a large overhead increase due to PEB calculation cost. The method includes providing an image, calculating initial acid concentration and adding acid concentration contours to the image, calculating deprotection concentration and adding deprotection concentration contours to the image, determining latent image contour without diffusion, moving the latent image contour in a direction of lower deprotection concentration to provide the final latent image, performing OPC on the chemically amplified resist using edge movement based on the final latent image, and repeating the process to obtain convergence.

Method and systems for utilizing simplified resist process models to perform optical and process corrections

A method and system are provided for analyzing process window compliance of an integrated circuit design. Aspects of the present invention include identifying layout pattern configurations that have process windows that fail to meet respective local performance specifications; searching for any layout pattern configurations in a design that substantially match any of the identified layout pattern configurations; and modifying any matching layout pattern configurations found in the design to make the layout pattern configurations compliant with their respective process windows.

Yield-limiting design-rules-compliant pattern library generation and layout inspection

The present invention provides methods and apparatus for accomplishing a phase shift lithography process using a off axis light to reduce the effect of zero order light to improve the process window for maskless phase shift lithography systems and methodologies. A lithography system is provided. The lithography system provided uses off axis light beams projected onto a mirror array configured to generate a phase shift optical image pattern. This pattern is projected onto a photoimageable layer formed on the target substrate to facilitate pattern transfer.

Process and apparatus for achieving single exposure pattern transfer using maskless optical direct write lithography

A method for verifying reticle enhancement technique latent image sensitivity to mask manufacturing errors. The method includes the steps of revising a polygon based on mask CD distributions to provide a virtual mask, imaging the virtual mask to obtain response function statistical parameters, and comparing the statistical parameters to process tolerance requirements. Preferably, the method includes the steps of simulating an aerial and/or latent image of the virtual mask, calculating response functions based on the mask image simulation, collecting measurements and calculating statistical parameters based on the response functions, and comparing the statistical parameters with design rule requirements (i.e., for DI yield percentage for required mask manufacturing specification). The virtual mask is obtained by using mask CD distribution to induce statistical variations to layouts which have passed through the conventional OPC procedure.

Method and apparatus for verifying the post-optical proximity corrected mask wafer image sensitivity to reticle manufacturing errors

The invention provides a method of performing process window compliant corrections of a design layout. The invention includes an operator performing the following steps: (1) simulating Develop Inspect Critical Dimension (DI CD) at best exposure conditions using the provided original layout pattern; (2) simulating DI CD at predefined boundary exposure conditions using the provided original layout pattern; (3) if the DI CD from step (1) meets the target DI CD definition, and the DI CD from step (2) meets process window specifications, convergence takes place; and (4) modifying the layout pattern and repeating steps (2) through (3) until DI CD from step (2) reaches the specification limit if any portion of step (3) is not achieved.

Process window compliant corrections of design layout

A method and system of optimizing the illumination of a mask in a photolithography process. A specific, preferred method includes the steps of: loading minimum design rules of a layout, loading exposure latitude constraints, loading mask error constraints, loading initial illumination conditions, simulating current illumination conditions, obtaining dose-to-print threshold from the minimum design rules (i.e., lines-and-space feature), applying OPC on the layout using the dose-to-print threshold, calculating DOF using the exposure latitude and mask error constraints, changing the illumination conditions in order to attempt to maximize common DOF with the exposure latitude and mask error constraints, and continuing the process until maximum common DOF is obtained.

OPC based illumination optimization with mask error constraints

The present invention provides methods and apparatus for accomplishing a strong phase shift direct write lithography process using reconfigurable optical mirrors. A maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used to generate strong phase shift optical patterns which are directed onto a photoimageable layer of a substrate in order to facilitate pattern transfer. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement.

Process and apparatus for generating a strong phase shift optical pattern for use in an optical direct write lithography process

A method and system for performing optical proximity correction (OPC) on an integrated circuit (IC) mask design is disclosed. The system and method of the present invention includes identifying a feature in the IC mask design, generating an isofocal contour for the identified feature, wherein the isofocal contour is a continuum of isofocal points corresponding to points on an edge of the identified feature, and utilizing the isofocal contour to estimate an amount of correction needed to produce a resist image significantly identical to the identified feature.

Method and system for utilizing an isofocal contour to perform optical and process corrections

A method and apparatus for improving resolution in photolithography. The method includes steps of mapping a first phase onto a first mask, mapping a second phase onto a second mask, and mapping a trim onto the first mask or second mask (or both). Specifically, the first mask may include Phase1 mapped to 0/180 phase, and the second mask may include Phase2 and trim mapped to 0/180 phase. A set of masks consistent with the foregoing is provided.

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Portland, OR, United States of America

Ebo H Croffie