International Business Machines Corporation

Eberhard B Gramatzki

Eric A Johnson

Irving Memis

William E Bernier

Son K Tran

Charles F Carey

Robert F White

Pierre M Langevin

Thomas R Homa

Allan Robert Bertolet

James Fiore

A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.

Extension of fatigue life for C4 solder ball to chip connection

A method of fabrication are provided in which permanent external electrical connection to active circuitry in a semiconductor structure can be made through either a wire bond pad or metal bump formed thereon. A final metallization including a wire bond pad is disposed over and electrically connected with the active circuitry. An insulating material film is disposed over the final metallization leaving the wire bond pad and a portion of the final metallization laterally displaced from the pad exposed. A metal bump contacts the laterally displayed exposed portion of the final metallization. The wire bond pad is electrically coupled with and laterally displaced from the metal bump through the final metallization. The metal bump and wire bond pad are configured to facilitate electrical connection of the semiconductor structure with an external connector, such as a modular packaging substrate. The structure may also be used for testing and burning in a semiconductor die without direct physical contact of the external testing device to the wire bond pad.

Chip design process for wire bond and flip-chip package

Growing community of inventors

Essex Junction, VT, United States of America

Eberhard B Gramatzki