International Business Machines Corporation

Advanced Micro Devices Corporation

Globalfoundries Inc.

Applied Materials, Inc.

E Todd Ryan

Alfred Grill

Son Van Nguyen

Hosadurga K Shobha

Joshua L Herman

Griselda Bonilla

Daniel C Edelstein

Robert Dennis Miller

Sampath Purushothaman

Elbert Emin Huang

Terry Allen Spooner

Muthumanickam Sankarapandian

Willi Volksen

John Christopher Arnold

John A Iacoponi

William J Cote

Satya Venkata Nitta

Geraud J Dubois

Holger S Schuehrer

Ritwik Bhatia

Seung-Hyun Rhee

A method of forming a carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. The dielectric film may optionally include nitrogen. When nitrogen is present, the carbon-rich silicon carbide-like dielectric film has a concentration nitrogen that is less than, or equal, to about 5 atomic % nitrogen.

Advanced low k cap film formation process for nano electronic devices

In one disclosed embodiment, the present method for depositing a conductive capping layer on metal lines comprises forming metal lines on a dielectric layer, applying a voltage to the metal lines, and depositing the conductive capping layer on the metal lines. The applied voltage increases the selectivity of the deposition process used, thereby preventing the conductive capping layer from causing a short between the metal lines. The conductive capping layer may be deposited through electroplating, electrolessly, by atomic layer deposition (ALD), or by chemical vapor deposition (CVD), for example. In one embodiment, the present method is utilized to fabricate a semiconductor wafer. In one embodiment, the metal lines comprise copper lines, while the conductive capping layer may comprise tantalum or cobalt. The present method enables deposition of a capping layer having high electromigration resistance.

Method for depositing a conductive capping layer on metal lines

Methods of minimizing or eliminating plasma damage to low k and ultra low k organosilicate intermetal dielectric layers are provided. The reduction of the plasma damage is effected by interrupting the etch and strip process flow at a suitable point to add an inventive treatment which protects the intermetal dielectric layer from plasma damage during the plasma strip process. Reduction or elimination of a plasma damaged region in this manner also enables reduction of the line bias between a line pattern in a photoresist and a metal line formed therefrom, and changes in the line width of the line trench due to a wet clean after the reactive ion etch employed for formation of the line trench and a via cavity. The reduced line bias has a beneficial effect on electrical yields of a metal interconnect structure.

Methods to mitigate plasma damage in organosilicate dielectrics

Embodiments of a method for fabricating a semiconductor device are provided. In one embodiment, the method includes the steps of providing a partially-completed semiconductor device including a first feature formed in a porous material, wet cleaning the partially-completed semiconductor device with an aqueous cleaning solvent, exposing the partially-completed semiconductor device to a liquid chemical that forms an azeotropic mixture with water, and inducing evaporation of the azeotropic mixture to remove residual water from within the porous material absorbed during the wet cleaning step.

Methods for fabricating semiconductor devices including azeotropic drying processes

A carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. In some embodiments, the dielectric film may optionally include nitrogen. When nitrogen is present, the carbon-rich silicon carbide-like dielectric film has a concentration nitrogen that is less than, or equal, to about 5 atomic % nitrogen. The carbon-rich silicon carbide-like dielectric film can be used as a dielectric cap layer in an interconnect structure. The inventive dielectric film is highly robust to UV curing and remains compressively stressed after UV curing. Moreover, the inventive dielectric film has good oxidation resistance and prevents metal diffusion into an interconnect dielectric layer. The present invention also provides an interconnect structure including the inventive dielectric film as a dielectric cap. A method of fabricating the inventive dielectric film is also provided.

A semiconductor package is provided having reduced tensile stress. The semiconductor package includes a package substrate and a semiconductor die. The semiconductor die is coupled electrically and physically to the package substrate and includes a stress relieving layer incorporated therein. The stress relieving layer has a predetermined structure and a predetermined location within the semiconductor die for reducing tensile stress of the semiconductor package during heating and cooling of the semiconductor package.

Method and apparatus for reducing semiconductor package tensile stress

Leakage, capacitance and reliability degradation of interconnects fabricated in low-k dielectric materials, particularly porous low-k dielectric material, due to penetration by a barrier metal and/or barrier metal precursor during damascene processing is prevented by depositing a conformal, heat stable dielectric sealant layer on sidewalls of the low-k dielectric material defining the damascene opening. Embodiments include forming a dual damascene opening in a porous, low-k organosilicate layer, the organosilicate having a pendant silanol functional group, depositing a siloxane polymer having a silylating functional group which bonds with the pendant silanol group to form the sealant layer, depositing a Ta and/or TaN barrier metal layer by CVD or ALD and filling the opening with Cu or a Cu alloy.

Interconnects with a dielectric sealant layer

A dielectric cap, interconnect structure containing the same and related methods are disclosed. The inventive dielectric cap includes a multilayered dielectric material stack wherein at least one layer of the stack has good oxidation resistance, Cu diffusion and/or substantially higher mechanical stability during a post-deposition curing treatment, and including Si&#x2014;N bonds at the interface of a conductive material such as, for example, Cu. The dielectric cap exhibits a high compressive stress and high modulus and is still remain compressive stress under post-deposition curing treatments for, for example: copper low k back-end-of-line (BEOL) nanoelectronic devices, leading to less film and device cracking and improved reliability.

Advanced multilayer dielectric cap with improved mechanical and electrical properties

The invention provides a method of exposing low-k dielectric films to microwave radiation to cure the dielectric films. Microwave curing reduces the cure-time necessary to achieve the desired mechanical properties in the low-k films, thus decreasing the thermal exposure time for the NiSi transistor contacts. A lower thermal budget for interconnect fabrication is necessary to prevent damage to the NiSi transistor contacts and minimize thermal stressing of previously formed interconnect layers. Microwave-cured dielectric films also have higher mechanical strength and strong adhesion to overlying layers deposited during subsequent semiconductor device manufacturing steps.

Growing community of inventors

Clifton Park, NY, United States of America

E Todd Ryan