Other

Unimicron Technology Corporation

Industrial Technology Research Institute

Adl Engineering Inc.

Hannstar Display Corporation

Advanced Chip Engineering Technology, Inc.

Advanced Clip Engineering Technology Inc.

Hu, Dyi-Chung

Dyi-Chung Hu

Tzyy-Jang Tseng

Yu-Shan Hu

Yu-Hua Chen

Ming-Chih Chen

Wei-Chung Lo

Ying-Chih Chan

Chang-Hong Hsieh

Ra-Min Tain

Yin-Po Hung

Jwo-Huei Jou

Tean-Sen Jen

Shyh-Ming Chang

John Hon-Shing Lau

Chung W Ho

Yu-Chi Lee

Chun-Hui Yu

Jen-Huang Jeng

Shih-Liang Cheng

Chih-Wei Lin

Huan-Ling Lee

Sheng-Yuah He

A manufacturing method of an integrated substrate structure is provided. The manufacturing method includes the following steps. A fine redistribution structure is formed over a temporary carrier. A plurality of first trenches is formed in the fine redistribution structure to form a plurality of fine redistribution segments. A coarse redistribution structure is coupled to the plurality of fine redistribution segments through a plurality of conductive connectors. A size of the coarse redistribution structure is greater than a size of the plurality of fine redistribution segments. The temporary carrier is removed from the plurality of fine redistribution segments after the coupling.

Manufacturing method of integrated substrate structure

A semiconductor device for testing a device under test includes a circuit board, a plurality of probes disposed below the circuit board and facing the device under test, an integrated substrate disposed between the circuit board and the plurality of probes, and signal-transmitting module disposed on the circuit board and next to the integrated substrate. The plurality of probes is electrically coupled to the circuit board through the integrated substrate, and the signal-transmitting module transmits a test signal to the plurality of probes through the integrated substrate and the circuit board to perform a test to the device under test. Another semiconductor device including the integrated substrate and a manufacturing method thereof are provided.

Semiconductor device

A manufacturing method of a circuit carrier with a chip mounted thereon is provided. A fine redistribution structure is formed over a first temporary carrier. A first release layer is applied on the first temporary carrier. A plurality of conductive connectors is formed on the fine redistribution structure to form a first portion. The fine redistribution structure and the conductive connectors are transferred to a second temporary carrier. The second temporary carrier is provided with a second release layer. The first temporary carrier is removed after the conductive connectors inserted into the second release layer. A surface finishing process is performed on the fine conductive pattern distributed on the fine redistribution structure to form a surface finishing layer. The fine redistribution structure and the surface finishing layer formed thereon are adhered to a third temporary carrier through a third release layer. The first portion is disposed on a second portion.

Manufacturing method of circuit carrier with chip mounted thereon

A package substrate including a first redistribution structure, a first bonding layer, a core, a second bonding layer and a second redistribution structure in a sequential order is provided. The first redistribution structure has a first redistribution surface and a first bonding pad disposed on the first redistribution surface. The second redistribution structure has a second redistribution surface and a second bonding pad disposed on the second redistribution surface. The core has a first core pad disposed on a first core surface, and a second core pad disposed on a second core surface opposite to the first core surface. The first core pad is directly bonded to first bonding pad and offset from first bonding pad. The first bonding pad and the first core pad are embedded in the first bonding layer. The second core pad is contacting the second bonding pad through a conductive portion of the second bonding layer. A package structure is also provided.

Package substrate and package structure

A semiconductor substrate structure includes a first group of circuit structure and a second group of circuit structure. The first group of circuit structure includes multiple first circuit layers and a first bonding layer. The second group of circuit structure includes multiple second circuit layers and a second bonding layer. The second group of circuit structure is disposed on the first group of circuit structure and is electrically connected to the first group of circuit structure. The first bonding layer is bonded to the second bonding layer to form a multilayer redistribution structure. A manufacturing method of the semiconductor substrate structure is also provided.

Semiconductor substrate structure and manufacturing method thereof

A semiconductor manufacturing method includes forming a first redistribution structure with a fine redistribution circuitry over a first temporary carrier; forming testing tips on a first surface of the fine redistribution circuitry; transferring the testing tips and the first redistribution structure to a second temporary carrier provided with a temporary adhesive layer, where the testing tips are embedded in the temporary adhesive layer with the second temporary carrier disposed on the temporary adhesive layer; releasing the first temporary carrier to expose a second surface of the fine redistribution circuitry; coupling a second redistribution structure with a coarse redistribution circuitry to the first redistribution structure through conductive joints, where the conductive joints are formed on the second surface of the fine redistribution circuitry; and releasing the second temporary carrier and the temporary adhesive layer from the testing tips and the first redistribution structure after coupling the second redistribution structure.

Manufacturing method of integrated substrate

An integrated substrate structure includes a redistribution film, a circuit substrate, and a plurality of conductive features. The redistribution film includes a fine redistribution circuitry, a circuit substrate is disposed over the redistribution film and includes a core layer and a coarse redistribution circuitry disposed in and on the core layer. The circuit substrate is thicker and more rigid than the redistribution film, and a layout density of the fine redistribution circuitry is denser than that of the coarse redistribution circuitry. The conductive features are interposed between the circuit substrate and the redistribution film to be connected to the fine redistribution circuitry and the coarse redistribution circuitry. A redistribution structure and manufacturing methods are also provided.

Integrated substrate structure, redistribution structure, and manufacturing method thereof

A semiconductor substrate structure including a first group of circuit structure and a second group of circuit structure is provided. The first group of circuit structure includes multiple first wiring layers and multiple first conductive connectors, and each of the first conductive connectors includes a conductive cap. The second group of circuit structure includes multiple second wiring layers and multiple second conductive connectors. The first group of circuit structure and the second group of circuit structure are electrically connected through bonding of the first conductive connectors and the second conductive connectors to form a multilayer redistribution structure. A manufacturing method of the semiconductor substrate structure is also provided.

A millimeter wave antenna module package structure includes a first group of circuit structure, a second group of circuit structure, and a plurality of joints. The first group of circuit structure includes at least one first circuit layer and a plurality of first conductive connectors, and the at least one first circuit layer includes an antenna pattern. The second group of circuit structure includes a plurality of second circuit layers and a plurality of second conductive connectors. The joints are disposed between the first group of circuit structure and the second group of circuit structure. The joints are connected to the first conductive connectors and the second conductive connectors, such that the first group of circuit structure is electrically connected to the second group of circuit structure to form a multi-layer redistribution structure. A manufacturing method of the millimeter wave antenna module package structure is also provided.

Millimeter-wave antenna module package structure and manufacturing method thereof

An integrated substrate, an electronic assembly, and manufacturing methods thereof are provided. The integrated substrate structure includes a coarse redistribution structure, fine redistribution segments, and conductive connectors. The coarse redistribution structure includes a coarse dielectric layer and a coarse circuitry embedded therein. The fine redistribution segments disposed over the coarse redistribution structure and disposed side by side and apart from one another. The respective fine redistribution segment includes a fine dielectric layer thinner than the coarse dielectric layer, and a fine circuitry embedded in the fine dielectric layer. The fine circuitry includes a dimension and a pitch finer than those of the coarse circuitry, and a layout density of the fine circuitry is denser than that of the coarse circuitry. The conductive connectors are interposed between the coarse redistribution structure and the fine redistribution segments, and the coarse circuitry is electrically coupled to the fine circuitry through the conductive connectors.

Integrated substrate structure, electronic assembly, and manufacturing method thereof

A package substrate includes a substrate, an interposer and an insulating protective layer. The substrate has a first surface and a second surface opposing to the first surface. The first surface includes a plurality of first conductive pads. The interposer is disposed on the first surface of the substrate such that the first conductive pads are partially covered by the interposer. The interposer includes a plurality of penetrating conductive vias electrically connected to the substrate. The insulating protective layer is disposed on the first surface of the substrate and surrounding the interposer. The insulating protective layer includes at least one penetrating conductive column, wherein a first width of the respective penetrating conductive column is greater than a second width of each of the penetrating conductive vias of the interposer.

Package substrate and method of fabricating the same

A semiconductor device for testing a semiconductor wafer includes a circuit board, a probe disposed below the circuit board and facing the semiconductor wafer, an integrated substrate disposed between the circuit board and the probe, and signal-transmitting module disposed on the circuit board and next to the integrated substrate. The probe is electrically coupled to the circuit board through the integrated substrate, and the signal-transmitting module transmits a test signal to the probe through the integrated substrate and the circuit board to perform a test to the semiconductor wafer. Another semiconductor device including the integrated substrate and a manufacturing method thereof are provided.

Semiconductor device and manufacturing method thereof

A manufacturing method of a carrier for a semiconductor chip mounting thereon is provided. The method includes at least the following steps. A plurality of conductive connectors is formed on a fine redistribution structure to form a first portion, where the semiconductor chip is adapted to be mounted on the fine redistribution structure opposite to the conductive connectors. Each of the conductive connectors includes a bump and a solder cap formed on the bump, and the bump is directly connected to the fine redistribution structure. The first portion is disposed on a second portion, where the second portion includes a top redistribution structure directly connected to the solder cap and a second redistribution structure connected to the top redistribution structure, the first portion is disposed on the top redistribution structure, and a contact density of the top redistribution structure is denser than a contact density of the bottom redistribution structure.

Manufacturing method of carrier for semiconductor chip mounting thereon

A package substrate including a first redistribution structure, a first bonding layer, a core, a second bonding layer and a second redistribution structure in a sequential order is provided. The first redistribution structure has a first redistribution surface and a first bonding pad disposed on the first redistribution surface. The second redistribution structure has a second redistribution surface and a second bonding pad disposed on the second redistribution surface. The core has a first core pad disposed on a first core surface, and a second core pad disposed on a second core surface opposite to the first core surface. The first core pad and the second core pad are directly bonded to first bonding pad and the second bonding pad, respectively. The first core pad and the second core pad are offset from first bonding pad and the second bonding pad, respectively. The first bonding pad and the first core pad are embedded in the first bonding layer. The second bonding pad and the second core pad are embedded in the second bonding layer. A package structure is also provided.

An integrated substrate for testing a semiconductor wafer and a method are provided. The integrated substrate includes a first redistribution structure including a fine redistribution circuitry, a plurality of testing tips disposed on a first surface of the first redistribution structure and electrically connected to the fine redistribution circuitry to probe the semiconductor wafer, a second redistribution structure including a coarse redistribution circuitry and disposed over a second surface of the first redistribution structure opposite to the first surface, and a plurality of conductive joints interposed between the coarse redistribution circuitry and the fine redistribution circuitry to provide electrical connections therebetween. A layout density of the fine redistribution circuitry is denser than that of the coarse redistribution circuitry.

Growing community of inventors

Hsinchu, Taiwan

Dyi-Chung Hu